ST92196A STMicroelectronics, ST92196A Datasheet - Page 166

• Manufacturer Part Number: ST92196A
• Description: 8/16-bit Mcu For Tv Applications With Up To 96k Rom, On-screen-display And 1 Or 2 Data Slicers
• Manufacturer: STMicroelectronics

DATA SLICER (Cont’d)
Bit 4 = SEARCH: Enhanced Signal Search.
This bit is set and cleared by software. This bit
should be set to improve the reliability of properly
identifying signals in closed caption and Gemstar
format when doing a search encompassing all hor-
izontal lines in the vertical blanking interval.
0: Check 5 bits in the Frame code
1: Check 8 bits in the Frame code
Bit 3 = SCG_EN: Block Copy-Guard signals.
In video signals with Copy-Guard protection puls-
es similar to horizontal sync pulses may have
been inserted into certain lines in the vertical
blanking interval.
0: No blocking
1: Copy-Guard pulse occurring 8 µs before the an-
Bit 2 = PHD[2:0]: Horizontal phase compensation.
These bits specify the delay added in 4µs incre-
ments to the clock for the half-line counter in logic
that identifies the specified line. This feature is
used in 2H mode of operation to compensate for a
large phase difference which may exist between
2H deflection pulses and horizontal sync pulses
extracted from video.
MONITOR REGISTER (MR)
R246 - Read/Write
Register Page: 45
Reset Value: 0000 0000 (00h)
Bit 7 = CCMODE: Closed Caption Mode.
This bit is set by hardware and cleared by soft-
ware.
0: No closed caption format detected
1: Closed caption format detected
Bit 6 = GSMODE: Gemstar Mode.
This bit is set by hardware and cleared by soft-
ware.
0: No Gemstar format detected
1: Gemstar format detected
MODE
ticipated occurrence of normal horizontal sync
pulses are blocked from reaching the line detec-
tion logic
CC
7
MODE
GS
FIELD
1
IN_SY
NC
EVNP
4
EVNP
3
EVNP
2
EVNP
0
1
Bit 5= FIELD1: Field 1 flag.
This bit is set and cleared by hardware.
0: Field 2 detected
1: Field 1 detected
WARNING: The bit value is not valid after tuning of
a new channel or in case of a momentary drop-out
of the tuned signal. In this case, the use of the
IN_SYNC bit is required.
Bit 4= IN_SYNC: Phase of line monitoring relative
to video field.
This bit is set and cleared by hardware. Software
should read this bit periodically in case data in
closed caption and/or Gemstar format must be re-
covered from lines in both fields (e.g. closed cap-
tions from Line#21 of Field1 and extended data
service information from Line#21 of Field2).
0: Periodic writing of the appropriate line codes
1: The start of a specified line has been detected in
Note: In situations where the closed caption or
Gemstar data is on lines which are all in the same
field, e.g. Field#1, the hardware in the data slicer
cell will automatically correct an out-of-phase situ-
ation. Such a situation will be corrected within the
period of one frame of video.
In a more general situation, data must be recov-
ered from lines in both fields, and then the hard-
ware cannot on its own correct the polarity of an
out-of-phase FIELD#1 signal. The correction must
therefore be done by software on basis of informa-
tion provided by the IN_SYNC status bit.
Bit 3:0= EVNP[4:1]: Parity Event Bits
These bits are set and cleared by hardware. They
indicate the detected parity of data bytes 1 through
4 (only 3 and 4 for closed caption format). These
bits should normally be low.
0: Odd parity detected
1: Even parity detected
- CLOSED CAPTION DATA SLICER (DS)
into Register CR1 is out of phase with the field
sequence of the video input signal. In this case
the phasing can be corrected by skipping just
once the change of the line code stored in the
CR1 register and writing the immediately follow-
ing field.
one or both of the last 2 fields.
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