ST92196A STMicroelectronics, ST92196A Datasheet - Page 66

• Manufacturer Part Number: ST92196A
• Description: 8/16-bit Mcu For Tv Applications With Up To 96k Rom, On-screen-display And 1 Or 2 Data Slicers
• Manufacturer: STMicroelectronics

5.4 RESET/STOP MANAGER
The RESET/STOP Manager resets the device
when one of the three following triggering events
occurs:
– A hardware reset, consequence of a falling edge
– A software reset, consequence of an HALT in-
– A Watchdog end of count.
The RESET input is schmitt triggered.
Note: The memorized Internal Reset (called RE-
SETI) will be maintained active for a duration of
Figure 30. Reset Overview
n
Figure 31. Recommended Signal to be Applied
on Reset Pin
0.7 V
V
0.3 V
on the RESET pin.
struction when enabled.
RESET
V
DD
DD
DD
RESET
RESETI
Minimum
20 µs
Memorized
Build-up Counter
Reset
RESET AND CLOCK CONTROL UNIT (RCCU)
32768 Oscin periods (about 8 ms for a 4 MHz crys-
tal) after the external input is released (set high).
This RESETI internal Reset signal is output on the
I/O port bit P5.0 (active low) during the whole reset
phase until the P5.0 configuration is changed by
software. The true internal reset (to all macrocells)
will only be released 511 Reference clock periods
after the Memorized Internal reset is released.
It is possible to know which was the last RESET
triggering event, by reading bits 5 and 6 of register
CLK_FLAG.
RCCU
True
Internal
Reset
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