ST92196A STMicroelectronics, ST92196A Datasheet - Page 207

• Manufacturer Part Number: ST92196A
• Description: 8/16-bit Mcu For Tv Applications With Up To 96k Rom, On-screen-display And 1 Or 2 Data Slicers
• Manufacturer: STMicroelectronics

SERIAL COMMUNICATIONS INTERFACE (Cont’d)
CHARACTER
(CHCR)
R250 - Read/Write
Reset value: undefined
Bit 7 = AM: Address Mode .
This bit, together with the AMEN bit (in the IDPR
register), decodes the desired addressing/9th data
bit/character match operation. Please refer to the
table in the IDPR register description.
Bit 6 = EP: Even Parity .
0: Select odd parity (when parity is enabled).
1: Select even parity (when parity is enabled).
Bit 5 = PEN: Parity Enable .
0: No parity bit.
1: Parity bit generated (transmit data) or checked
Note: If the address/9th bit is enabled, the parity
bit will precede the address/9th bit (the 9th bit is
never included in the parity calculation).
Bit 4 = AB: Address/9th Bit .
0: No Address/9th bit.
1: Address/9th bit included in the character format
Bit 3:2 = SB[1:0]: Number of Stop Bits ..
Bit 1:0 = WL[1:0]: Number of Data Bits
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- SERIAL COMMUNICATIONS INTERFACE (SCI)
AM
(received data).
between the parity bit and the first stop bit. This
bit can be used to address the SCI or as a ninth
data bit.
7
SB1
0
0
1
1
WL1
0
0
1
1
EP
PEN
SB0
0
1
0
1
CONFIGURATION
AB
WL0
0
1
0
1
SB1
Number of stop bits
SB0
1.5
2.5
1
2
Data Length
REGISTER
WL1
5 bits
6 bits
7 bits
8 bits
WL0
0
CLOCK CONFIGURATION REGISTER (CCR)
R251 - Read/Write
Reset value: 0000 0000 (00h)
Bit 7:3 = Reserved. Must be left at reset value.
Bit 2 = AEN: Auto Echo Enable .
0: No auto echo mode.
1: Put the SCI in auto echo mode.
Note: Auto Echo mode has the following effect:
the SCI transmitter is disconnected from the data-
out pin SOUT, which is driven directly by the re-
ceiver data-in pin, SIN. The receiver remains con-
nected to SIN and is operational, unless loopback
mode is also selected.
Bit 1 = LBEN: Loopback Enable .
0: No loopback mode.
1: Put the SCI in loopback mode.
Note: In this mode, the transmitter output is set to
a high level, the receiver input is disconnected,
and the output of the Transmitter Shift Register is
looped back into the Receiver Shift Register input.
All interrupt sources (transmitter and receiver) are
operational.
Bit 0 = STPEN: Stick Parity Enable .
0: The transmitter and the receiver will follow the
1: The transmitter and the receiver will use the op-
parity of even parity bit EP in the CHCR register.
posite parity type selected by the even parity bit
EP in the CHCR register.
7
1 (even)
1 (even)
-
0 (odd)
0 (odd)
EP
-
-
SPEN
0
0
1
1
-
-
Parity (Transmitter &
AEN
Receiver)
Even
Even
Odd
Odd
LBEN
STPEN
0