ST92196A STMicroelectronics, ST92196A Datasheet - Page 51

• Manufacturer Part Number: ST92196A
• Description: 8/16-bit Mcu For Tv Applications With Up To 96k Rom, On-screen-display And 1 Or 2 Data Slicers
• Manufacturer: STMicroelectronics

3.6 EXTERNAL INTERRUPTS
The standard ST9 core contains 8 external inter-
rupts sources grouped into four pairs.
Table 11. External Interrupt Channel Grouping
Each source has a trigger control bit TEA0,..TED1
(R242,EITR.0,..,7 Page 0) to select triggering on
the rising or falling edge of the external pin. If the
Trigger control bit is set to “1”, the corresponding
pending bit IPA0,..,IPD1 (R243,EIPR.0,..,7 Page
0) is set on the input pin rising edge, if it is cleared,
the pending bit is set on the falling edge of the in-
put pin. Each source can be individually masked
through
IMA0,..,IMD1 (EIMR.7,..,0). See
The priority level of the external interrupt sources
can be programmed among the eight priority lev-
els with the control register EIPLR (R245). The pri-
ority level of each pair is software defined using
the bits PRL2, PRL1. For each pair, the even
channel (A0,B0,C0,D0) of the group has the even
priority level and the odd channel (A1,B1,C1,D1)
has the odd (lower) priority level.
Figure 23. Priority Level Examples
n
Figure 23
Figure 1
rupt control bits and vectors.
– The source of the interrupt channel A1 can be
51/268
INT.C1: 001=1
SOURCE
INT.D0:
INT.D1:
INT.C0: 000=0
INTERRUPTS
selected between the external pin INT4 (when
INTS = 1) or the on-chip Standard Timer.
External Interrupt
101=5
100=4
PRIORITY
gives an overview of the External inter-
shows an example of priority levels.
INT7
INT6
INT5
INT4
INT3
INT2
INT1
INT0
the
PL2D PL1D PL2C PL1C PL2B PL1B PL2A PL1A
1
0
corresponding
0
0
1
0
0
Figure
Channel
INTD1
INTD0
INTC1
INTC0
INTB1
INTB0
INTA1
INTA0
1
SOURCE
control
INT.A0: 010=2
INT.A1: 011=3
INT.B1: 101=5
INT.B0: 100=4
EIPLR
1.
VR000151
PRIORITY
bit
– The source of the interrupt channel B0 can be
– The source of the interrupt channel INTB1 can
– The source of the interrupt channel INTC0 can
– The source of the interrupt channel C1 can be
– The source of the interrupt channel D0 can be
– The source of the interrupt channel D1 can be
Warning: When using channels shared by both
external interrupts and peripherals, special care
must be taken to configure their control registers
for both peripherals and interrupts.
Table 12. Multiplexed Interrupt Sources
Channel
INTA0
INTA1
INTB0
INTB1
INTC0
INTC1
INTD0
INTD1
selected between the external pin INT2 (when
(SPEN,BMS)=(0,0)) or the on-chip SPI peripher-
al.
be selected between the INT3 external pin
(CLEAR=1) or the I2C interrupt (CLEAR=0) by
programming the CLEAR bit in the I2CCTR reg-
ister.
be selected between the INT4 external pin (DI-
ON=OSDE=0) or the Display Controller interrupt
(all other cases) by programming the DION,
OSDE bits in the OSDER register.
selected between the external pin INT5 (when
the AD_INT bit in the AD-INT register=0) or the
on-chip ADC (when AD-INT=1).
selected between the external pin INT6 (when
the CCID bit in the DS0CR2 or DS1CR2 regis-
ter=1) or the on-chip Data Slicers (when
CCID=0).
selected between the external pin INT7 (when
the IRWDIS bit in the IRSC register = 1) or the
on-chip IR (when IRWDIS=0).
Timer/Watch-
SPI Interrupt
STIM Timer
DS0 & DS1
Interrupt
Internal
Source
OSD
ADC
dog
I2C
IR
Interrupt
External
Source
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
Related
P3.2
P3.4
P2.7
P2.0
P2.4
P2.2
P2.3
P2.1
Pin