mt48h8m16lf Micron Semiconductor Products, mt48h8m16lf Datasheet - Page 40

• Manufacturer Part Number: mt48h8m16lf
• Description: 128mb 8 Meg X 16, 4 Meg X 32 Mobile Sdram
• Manufacturer: Micron Semiconductor Products

Timing Diagrams
READs
PDF: 09005aef832ff1ea / Source: 09005aef832ff1ac
sdr_mobile_sdram_cmd_op_timing_dia_fr5.08__4.fm - Rev. B 6/08 EN
READ bursts are initiated with a READ command, as shown in Figure 9. The starting
column and bank addresses are provided with the READ command, and auto precharge
is either enabled or disabled for that burst access. If auto precharge is enabled, the row
being accessed is precharged at the completion of the burst. For the generic READ
commands used in the following illustrations, auto precharge is disabled.
During READ bursts, the valid data-out element from the starting column address is
available following the CL after the READ command. Each subsequent data-out element
will be valid by the next positive clock edge. Figure 17 on page 41 shows general timing
for each possible CL setting.
Upon completion of a burst, assuming no other commands have been initiated, the DQs
will go High-Z. A continuous page burst continues until terminated. At the end of the
page, it wraps to column 0 and continues.
Data from any READ burst may be truncated with a subsequent READ command, and
data from a fixed-length READ burst may be immediately followed by data from a READ
command. In either case, a continuous flow of data can be maintained. The first data
element from the new burst either follows the last element of a completed burst or the
last desired data element of a longer burst that is being truncated. The new READ
command should be issued x cycles before the clock edge at which the last desired data
element is valid, where x = CL - 1. This is shown in Figure 18 on page 42 for CAS latencies
of two and three.
Mobile SDRAMs use a pipelined architecture and therefore do not require the 2n rule
associated with a prefetch architecture. A READ command can be initiated on any clock
cycle following a previous READ command. Full-speed random read accesses can be
performed to the same bank, as shown in Figure 17 on page 41, or each subsequent
READ may be performed to a different bank.
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
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Timing Diagrams
Preliminary