AMD-766AC AMD [Advanced Micro Devices], AMD-766AC Datasheet - Page 24

• Manufacturer Part Number: AMD-766AC
• Description: Peripheral Bus Controller
• Manufacturer: AMD [Advanced Micro Devices]

23167B – March 2001
4.6.1.1
System management events cause corresponding STS registers to be set. STS registers may be enabled to generate
SCI and SMI interrupts. The following diagram shows how the STS registers are routed to the interrupts.
The “AND-OR” boxes in the middle of the diagram specify the logical AND of the STS and EN registers (or STS
and SMI_EN registers, as the case may be) the results of which are logically ORed together; for example: (STS1 &
EN1) | (STS2 & EN2)... All enabled ACPI interrupts may be routed to either SCI or SMI interrupts by
PM04[SCI_EN]. Or these STS registers may be routed directly to SMI through the SMI_EN registers, regardless of
the state of PM04[SCI_EN]. The USB controller and serial IRQ logic also provide sources of SMI that is ORed into
the logic. SMI and SCI are inputs to the interrupt logic; see section 4.3.4.
4.6.1.2
Configuration registers C3A[D8:A0] specify several traps for programmable memory and IO space address ranges.
PMA8 provides the status registers for these and several fixed-address traps. These traps are generated for the
specified transactions that are presented to the host PCI bus. They may be enabled to generate ACPI interrupts
through PMAC or SMI interrupts through PM2A.
Miscellaneous
PM20 Events
PM00 Events
PM[FF:F4],
PM[D3:C0]
PM[8C:40]
GPIO pins
LPT, USB
Hardware
SMBus
Events
Events
Traps
SMIs
SCI And SMI Control
Traps
SMI_EN register
PM20/22/2A
STS register
STS register
STS register
STS register
STS register
STS register
STS register
EN register
EN register
EN register
EN register
EN register
EN register
EN register
PMA8/AC
PMD4/D8
PME0/E2
PM00/02
PM30/32
PM24/25
AND-
AND-
AND-
AND-
AND-
AND-
AND-
AND-
OR
OR
OR
OR
OR
OR
OR
OR
Preliminary Information
EN register
EN register
EN register
EN register
EN register
PM2A
PM2A
PM2A
PM2A
PM2A
AMD-766
output
Serial
IRQ
SMI
TM
OR
OR
Peripheral Bus Controller Data Sheet
OR
emulation
keyboard
interrupt
USB
PM2C[SMI_EN]
1
0
PM04[SCI_EN]
SCI
SMI
24