AMD-766AC AMD [Advanced Micro Devices], AMD-766AC Datasheet - Page 79

• Manufacturer Part Number: AMD-766AC
• Description: Peripheral Bus Controller
• Manufacturer: AMD [Advanced Micro Devices]

23167B – March 2001
PM[B0:A8]: Trap Registers
The following table provides the hardware events associated with the status, interrupt enable, and system inactivity
timer reload events associated with these registers:
Note 1: The IDE register at IO address PORT1F6[4], specifies whether the access is to the master or slave primary
drive; this decoding is as follows: 0=master and 1=slave. Also, when the primary port is in native mode, then the
address is specified by C1A10 and C1A14 (not the fixed addresses shown).
Note 2: The IDE register at IO address PORT176[4], specifies whether the access is to the master or slave secondary
drive; this decoding is as follows: 0=master and 1=slave. Also, when the secondary port is in native mode, then the
address is specified by C1A18 and C1A1C (not the fixed addresses shown).
PMA8: Hardware Trap Status Register
IO mapped (base pointer: C3A58); offset: AB-A8h. Default: 0000_0000h. Read; set by hardware; write 1 to clear.
Each of these status bits is controlled by hardware trap events described above in PM[B0:A8]. If the trap occurs, then
the status bit is set. If a status bit and corresponding enable bit in PMAC are both high, ACPI interrupts occur.
31:20
Reserved
Bit[0] DPM_TRP_STS. IDE primary master port access trap status.
Bit[1] DPS_TRP_STS. IDE primary slave port access trap status.
Bit[2] DSM_TRP_STS. IDE secondary master port access trap status.
Bit[3] DSS_TRP_STS. IDE secondary slave port access trap status.
Bit[4] FDD_TRP_STS. Floppy disk drive access trap status.
Bit[5] LPT_TRP_STS. Parallel port (LPT) access trap status.
Bit[6] CMA_TRP_STS. Serial port A (COM A) access trap status.
Bit[7] CMB_TRP_STS. Serial port B (COM B) access trap status.
Bit[8] AUD_TRP_STS. Audio functions access trap status.
Bit[9] VID_TRP_STS. Video functions access trap status.
Bit[10] KBM_TRP_STS. Keyboard and mouse access trap status.
Bit Hardware reload trigger
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Access to the master primary IDE drive.
Access to the slave primary IDE drive.
Access to the master secondary IDE drive.
Access to the slave secondary IDE drive.
Access to the primary or secondary floppy disk controllers. IO space 3F0-3F5h, 3F7h, 370-375h,
Access to the parallel ports.
Access to serial port COMA.
Access to serial port COMB.
Access to the audio hardware.
Access to the video adapter.
Access to the legacy keyboard and mouse ports.
Access to PCMCIA slot 1.
Access to PCMCIA slot 2.
USB controller activity.
Access to programmable IO range monitor 1.
Access to programmable IO range monitor 2.
Access to programmable IO range monitor 3.
Access to programmable IO range monitor 4.
Access to programmable memory range monitor 1.
Access to programmable memory range monitor 2.
19:0
Status bits
Preliminary Information
AMD-766
Address specification
IO space 1F0-1F7h, 3F6h
IO space 1F0-1F7h, 3F6h
IO space 170-177h, 376h
IO space 170-177h, 376h
377h fixed
IO space 378-37Fh, 278-27Fh, 3BC-
3BFh
C3AA0, C3AA4
C3AA8, C3AAC, C3AB0
IO space 3B0-3DFh; memory space
0A0000-0BFFFFh
IO space 60h, 64h
C3AB4, C3AB8, C3ABC, C3AC0
Any USB controller DMA activity.
C3AC4, C3AC8, C3ACC
C3AD0, C3AD4, C3AD8
TM
Peripheral Bus Controller Data Sheet
Notes
1
1
2
2
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