PC87108AVJE NSC [National Semiconductor], PC87108AVJE Datasheet - Page 43

• Manufacturer Part Number: PC87108AVJE
• Description: Advanced UART and Infrared Controller
• Manufacturer: NSC [National Semiconductor]

3.0 Architectural Description
B3
B4
B5
B6
B7
4.0 Device Configuration
4.1 OVERVIEW
On power-up or after a hardware reset, the PC87108A will have all of its modules and functions disabled.
The GPIO and ID/IRSL [2–0] pins are in input mode. The IRTX and the UART output pins are set to their inactive state. Before
normal operation can be started, the device must be enabled and several items must be configured. These include the routing
of the interrupt and DMA control signals, as well as the setting of direction and output data for the GPIO pins.
Routing of interrupt and DMA control signals is provided to support plug-and-play, and is usually handled by the system
plug-and-play BIOS.
Additional items, related to the communications protocols and the infrared transceiver interface, are configured via appropriate
registers in the UIR module register set.
4.2 CONFIGURATION AND GPIO REGISTERS
Five registers are provided to control the basic configuration and the GPIO pins. One additional register is provided for device
identification. The way these registers are accessed is determined by the levels of the BADDR0 and BADDR1 pins during reset.
Two accessing modes are provided: Index/Data register mode, and CS (chip select) mode.
In the Index/Data register mode, two registers occupying consecutive address locations, are used. An index value is first loaded
into the Index register. The desired register is then read or written by accessing the Data register. As Table 18 shows, one of three
different addresses for the Index register can be selected.
Read/write 0’s.
IRSL21__DS – ID/IRSL[2–1] Pins’ Direction Select.
This bit determines the direction of the ID/IRSL[2–1] pins.
0
1
RXINV – IRRX Signal Invert.
This bit is provided to support optical transceivers with receive signals of opposite polarity (active high instead of active
low).
When set to 1, an inverter is placed on the receiver input signal path.
IRSL0__DS – ID0/IRSL0/IRRX2 Pin Direction Select.
This bit determines the direction of the ID0/IRSL0/IRRX2 pin.
0
1
IRRX__MD – IRRX Mode Select.
Determines whether a single input or two separate inputs are used for Low-Speed and High-Speed IrDA modes.
0
1
Table 17 shows the IRRXn pins used in the PC87108A for the low-speed and high-speed infrared modes, and for the vari-
ous combinations of IRSL0__DS, IRRX__MD and AUX__IRRX.
AMCFG – Automatic Module Configuration Enable.
When set to 1, automatic infrared transceiver configuration is enabled.
Pins’ direction is input.
Pins’ direction is ouput.
Pin’s direction is input.
Pin’s direction is output.
One input is used for both SIR and MIR/FIR.
Separate inputs are used for SIR and MIR/FIR.
IRSL0__DS
0
0
0
0
1
1
1
1
(HIS__IR = 1 When Selected Mode is MIR or FIR)
IRRX__MD
TABLE 17. Infrared Receiver Input Selection
0
0
1
1
0
0
1
1
(Continued)
AUX__IRRX
43
X
X
X
X
0
1
0
1
HIS__IR
0
1
X
X
0
1
x
x
IRRXn
IRRX1
IRRX2
IRRX1
IRRX2
IRRX1
IRRX3
IRRX1
IRRX3
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