PC87108AVJE NSC [National Semiconductor], PC87108AVJE Datasheet - Page 7

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PC87108AVJE

Manufacturer Part Number
PC87108AVJE
Description
Advanced UART and Infrared Controller
Manufacturer
NSC [National Semiconductor]
Datasheet
1.0 Pin Description
(Continued)
DS012549-2
FIGURE 2. Basic Configuration
2.0 Functional Description
2.1 DEVICE OVERVIEW
The PC87108A is a serial communications element that implements the most common infrared communications protocols.
In addition to the infrared modes, the device provides a UART mode of operation that is backward compatible to the 16550 to sup-
port existing communications software.
The device includes two basic modules: the UIR (universal infrared) module and the configuration module. The UIR module
implements all the communications functions, while the configuration module controls the enabling of the device as well as the
selection of the base address and the routing of the interrupt and DMA control signals. The general purpose I/O pins are also con-
trolled by the configuration module. The UIR module uses a register banking scheme similar to the one used by the 16550.
This minimizes the number of I/O addresses needed to access the internal registers. Most of the communications features are
programmed via configuration registers placed in banks 0 through 7. The main control and status information has been consoli-
dated into bank 0 to eliminate unnecessary bank switchings. A description of the device operation is provided in the following sec-
tions.
2.2 UART MODE
This mode is designed to support serial data communications with a remote peripheral device or modem using a wired interface.
The device provides transmit and receive channels that can operate concurrently to handle full-duplex operation. They perform
parallel-to-serial conversion on data characters received from the CPU or a DMA controller, and serial-to-parallel conversion on
data characters received from the serial interface. The format of the serial data stream is shown in Figure 3 . A data character con-
tains 5 to 8 data bits. It is preceded by a start bit and is followed by an optional parity bit and a stop bit. Data is transferred in Little
Endian order (least significant bit first).
The UART mode is the default mode of operation after power up or reset. In fact, after reset, the device enters the 16450 com-
patibility mode. In addition to the 16450 and 16550 compatibility modes, an extended mode of operation is also available. When
the extended mode is selected, the device architecture changes slightly and a variety of additional features are made available.
The interrupt sources are no longer prioritized, and an auxiliary status and control register replaces the scratch pad register. The
additional features include: transmitter FIFO thresholding, DMA capability, and interrupts on transmitter empty and DMA event.
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