AT89C51CC02UA-RATUM Atmel, AT89C51CC02UA-RATUM Datasheet - Page 121

• Manufacturer Part Number: AT89C51CC02UA-RATUM
• Description: IC 8051 MCU 16K FLASH 32-VQFP
• Manufacturer: Atmel
• Series: AT89C CANr

Specifications of AT89C51CC02UA-RATUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFP, 32-VQFP
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 20
• Number Of Timers: 1
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: CANADAPT28
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PCA Registers
4126L–CAN–01/08
Table 95. CMOD Register
CMOD (S:D9h)
PCA Counter Mode Register
Reset Value = 0XXX X000b
Bit Number
CIDL
7
2-1
7
6
5
4
3
0
Mnemonic
6
CPS1:0
-
CIDL
ECF
Bit
-
-
-
-
Description
PCA Counter Idle Control bit
Clear to let the PCA run during Idle mode.
Set to stop the PCA when Idle mode is invoked.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
EWC Count Pulse Select bits
CPS1 CPS0 Clock source
0
0
1
1
Enable PCA Counter Overflow Interrupt bit
Clear to disable CF bit in CCON register to generate an interrupt.
Set to enable CF bit in CCON register to generate an interrupt.
5
-
0
1
0
1
4
-
Internal Clock, FPca/6
Internal Clock, FPca/2
Timer 0 overflow
External clock at ECI/P1.2 pin (Max. Rate = FPca/4)
3
-
AT/T89C51CC02
CPS1
2
CPS0
1
ECF
0
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