AT89C51CC02UA-RATUM Atmel, AT89C51CC02UA-RATUM Datasheet - Page 89

IC 8051 MCU 16K FLASH 32-VQFP

AT89C51CC02UA-RATUM

Manufacturer Part Number
AT89C51CC02UA-RATUM
Description
IC 8051 MCU 16K FLASH 32-VQFP
Manufacturer
Atmel
Series
AT89C CANr
Datasheet

Specifications of AT89C51CC02UA-RATUM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
20
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
20
Number Of Timers
1
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
CANADAPT28
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number:
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Time Trigger
Communication (TTC)
and Message Stamping
Figure 44. Block Diagram of CAN Timer
4126L–CAN–01/08
CLOCK
CANSTCH.4
CANSTCH.5
Fcan
RXOK i
TXOK i
CANSTMPH & CANSTMPL
÷ 6
The T89C51CC02 has a programmable 16-bit Timer (CANTIMH&CANTIML) for mes-
sage stamp and TTC.
This CAN Timer starts after the CAN controller is enabled by the ENA bit in the CANG-
CON register.
Two modes in the timer are implemented:
Note:
The CAN Timer works in a roll-over from FFFFh to 0000h which serves as a time base.
When the timer roll-over from FFFFh to 0000h, an interrupt is generated if the ETIM bit
in the interrupt enable register IEN1 is set.
CANTCON
CANTIMH & CANTIML
Time Trigger Communication:
Message Stamping
Capture of this timer value in the CANTTCH & CANTTCL registers on Start
Of Frame (SOF) or End Of Frame (EOF), depending on the SYNCTTC bit in
the CANGCON register, when the network is configured in TTC by the TTC
bit in the CANGCON register.
In this mode, CAN only sends the frame once, even if an error occurs.
Capture of this timer value in the CANSTMPH & CANSTMPL registers of the
message object which received or sent the frame.
All messages can be stamps.
The stamping of a received frame occurs when the RxOk flag is set.
The stamping of a sent frame occurs when the TxOk flag is set.
CANGCON.1
CANTTCH & CANTTCL
ENA
When 0xFFFF to 0x0000
CANGCON.5
TTC
CANGCON.4
SYNCTTC
AT/T89C51CC02
SOF on CAN frame
EOF on CAN frame
OVRTIM
CANGIT.5
89

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