AT89C51CC02UA-RATUM Atmel, AT89C51CC02UA-RATUM Datasheet - Page 139
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AT89C51CC02UA-RATUM
Manufacturer Part Number
AT89C51CC02UA-RATUM
Description
IC 8051 MCU 16K FLASH 32-VQFP
Manufacturer
Atmel
Series
AT89C CANr
Datasheet
1.T89C51CC02CA-TDSIM.pdf
(159 pages)
Specifications of AT89C51CC02UA-RATUM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
20
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
20
Number Of Timers
1
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
CANADAPT28
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89C51CC02UA-RATUM
Manufacturer:
Atmel
Quantity:
1 845
4126L–CAN–01/08
Table 113. IPH1 Register
IPH1 (S:F7h)
Interrupt high priority Register 1
Reset Value = XXXX X000b
Number
Bit
7
-
7
6
5
4
3
2
1
0
Mnemonic Description
POVRH
PADCH
PCANH
Bit
6
-
-
-
-
-
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Timer Overrun Interrupt Priority Level Most Significant bit
POVRH
0
0
1
1
ADC Interrupt Priority Level Most Significant bit
PADCH
0
0
1
1
CAN Interrupt Priority Level Most Significant bit
PCANH
0
0
1
1
5
-
PADCL Priority level
POVRLPriority level
PCANLPriority level
0
1
0
1
0
1
0
1
0
1
0
1
Lowest
Highest
Lowest
Highest
Lowest
Highest
4
-
3
AT/T89C51CC02
POVRH
2
PADCH
1
PCANH
0
139