AT89C51CC02UA-RATUM Atmel, AT89C51CC02UA-RATUM Datasheet - Page 53
![IC 8051 MCU 16K FLASH 32-VQFP](/photos/39/71/397112/x_qfp-32_sml.jpg)
AT89C51CC02UA-RATUM
Manufacturer Part Number
AT89C51CC02UA-RATUM
Description
IC 8051 MCU 16K FLASH 32-VQFP
Manufacturer
Atmel
Series
AT89C CANr
Datasheet
1.T89C51CC02CA-TDSIM.pdf
(159 pages)
Specifications of AT89C51CC02UA-RATUM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
20
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
20
Number Of Timers
1
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
CANADAPT28
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89C51CC02UA-RATUM
Manufacturer:
Atmel
Quantity:
1 845
Broadcast Address
4126L–CAN–01/08
Here is an example of how to use given addresses to address different slaves:
The SADEN byte is selected so that each slave may be addressed separately.
For slave A, bit 0 (the LSB) is a don’t-care bit; for slaves B and C, bit 0 is a 1. To com-
municate with slave A only, the master must send an address where bit 0 is clear (e.g.
1111 0000b).
For slave A, bit 1 is a 0; for slaves B and C, bit 1 is a don’t care bit. To communicate with
slaves A and B, but not slave C, the master must send an address with bits 0 and 1 both
set (e.g. 1111 0011b).
To communicate with slaves A, B and C, the master must send an address with bit 0 set,
bit 1 clear, and bit 2 clear (e.g. 1111 0001b).
A broadcast address is formed from the logical OR of the SADDR and SADEN registers
with zeros defined as don’t-care bits, e.g.:
The use of don’t-care bits provides flexibility in defining the broadcast address, however
in most applications, a broadcast address is FFh. The following is an example of using
broadcast addresses:
For slaves A and B, bit 2 is a don’t care bit; for slave C, bit 2 is set. To communicate with
all of the slaves, the master must send an address FFh. To communicate with slaves A
and B, but not slave C, the master can send and address FBh.
Slave A:SADDR1111 0001b
Slave B:SADDR1111 0011b
Slave C:SADDR1111 0011b
Slave A:SADDR1111 0001b
Slave B:SADDR1111 0011b
Slave C:SADDR=1111 0010b
SADEN1111 1010b
Given1111 0X0Xb
SADEN1111 1001b
Given1111 0XX1b
SADEN1111 1101b
Given1111 00X1b
SADDR 0101 0110b
SADEN 1111 1100b
SADDR OR SADEN1111 111Xb
SADEN1111 1010b
Given1111 1X11b,
SADEN1111 1001b
Given1111 1X11B,
SADEN1111 1101b
Given1111 1111b
AT/T89C51CC02
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