R5F21134DFP#U0 Renesas Electronics America, R5F21134DFP#U0 Datasheet - Page 104

IC R8C MCU FLASH 32LQFP

R5F21134DFP#U0

Manufacturer Part Number
R5F21134DFP#U0
Description
IC R8C MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/13r
Datasheets

Specifications of R5F21134DFP#U0

Core Size
16-Bit
Program Memory Size
16KB (16K x 8)
Oscillator Type
Internal
Core Processor
R8C
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
22
Eeprom Memory Size
4KB
Ram Memory Size
1024Byte
Cpu Speed
20MHz
No. Of Timers
16
Digital Ic Case
RoHS Compliant
Controller Family/series
R8C/13
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21134DFP#U0R5F21134DFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21134DFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/13 Group
Rev.1.20
REJ09B0111-0120
Table 12.10 Programmable Waveform Generation Mode Specifications
NOTES:
1. Even when counting the secondary period, read out the TZPR register.
2. The set value in the TZPR register and TZSC register are enabled by writing a value to the TZPR register. The set
3. The TZOCNTbit is enabled in the following timings
Count source
Count operation
Output waveform width
and period
Count start condition
Count stop condition
Interrupt request generation timing In half of count source, after Timer Z underflows during secondary period (at the same
TZ
INT0 pin functions
Read from timer
Write to timer
Select function
_____
values are reflected to the waveform output beginning with the next primary period after writing to the Timer Z primary
register.
• When count starts
• When Timer Z interrupt request is generated
Therefore, pulse is output from the next primary period depending on the setting value of the TZOCNT bit.
OUT
12.3.2 Programmable Waveform Generation Mode
In this mode, an signal output from the TZ
the values in the TZPR register and TZSC register are counted alternately (see “Table 12.10 Program-
mable Waveform Generation Mode Specifications”). A counting starts by counting the value set in the
TZPR register. Figure 12.23 shows TYZMR and PUM registers in this mode. The Timer Z operates in
the same way as the Timer Y in this mode. See Figure 12.17 (Timer Y operation ex
ample in programmable waveform generation mode ).
Jan 27, 2006
pin function
Item
page 93 of 205
f
• Down-count
• When the timer underflows, it reloads the contents of primary reload register and sec-
Primary period
Secondary period : (n+1)(p+1)/f
Period
f
n: Set value in PREZ register, m: Set value in TZPR register, p: Set value in TZSC register
Write “1” (count start) to the TZS bit in the TYZMR register
Write “0” (count stop) to the TZS bit in the TYZMR register
time as the TZout output change) [Timer Z interrupt].
Pulse output
Use timer mode when using this pin as a programmable I/O port.
Programmable I/O port, or INT0 interrupt input
Count value can be read out by reading TZPR register.
Same applies to PREZ register
Value written to TZPR register is written to reload register only.
Same applies to TZSC register and PREZ register
• Output level latch select function
• Programmable waveform generation output switching function
1
i
ondary reload register alternately before continuing counting.
The output level during primary and secondary periods is selected by the TZOPL bit.
The output from TZ
the TZOCNT bit in the TYZOC register to “0”. A value in the P3_1 bit is output from the
TZ
, f
: Count source frequency
2
OUT
, f
8
, Timer Y underflow
by setting to “1”
: (n+1)(m+1)/f
: (n+1){(m+1)+(p+1)}/f
OUT
OUT
(3)
is inverted synchronously when Timer Z underflows by setting
.
_______
pin is inverted each time the counter underflows, while
(2)
i
i
.
Specification
i
(3)
.
12.3 Timer (Timer Z)

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