R5F21134DFP#U0 Renesas Electronics America, R5F21134DFP#U0 Datasheet - Page 135

IC R8C MCU FLASH 32LQFP

R5F21134DFP#U0

Manufacturer Part Number
R5F21134DFP#U0
Description
IC R8C MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/13r
Datasheets

Specifications of R5F21134DFP#U0

Core Size
16-Bit
Program Memory Size
16KB (16K x 8)
Oscillator Type
Internal
Core Processor
R8C
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
22
Eeprom Memory Size
4KB
Ram Memory Size
1024Byte
Cpu Speed
20MHz
No. Of Timers
16
Digital Ic Case
RoHS Compliant
Controller Family/series
R8C/13
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21134DFP#U0R5F21134DFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21134DFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/13 Group
Rev.1.20
REJ09B0111-0120
14. A/D Converter
NOTES:
Table 14.1 Performance of A/D converter
Method of A/D conversion Successive approximation (capacitive coupling amplifier)
Analog input voltage
Operating clock
Resolution
Integral nonlinearity error
Operating modes
Analog input pins
A/D conversion start condition ADST bit in ADCON0 register is set to “1” (A/D conversion starts)
Conversion speed per pin • Without sample and hold function
1. Does not depend on use of sample and hold function.
2. The frequency of
3. In repeat mode, only 8-bit mode can be used.
The A/D converter consists of one 10-bit successive approximation A/D converter circuit with a capacitive
coupling amplifier. The analog inputs share the pins with P0
using these pins, make sure the corresponding port direction bits are set to “0” (input mode).
When not using the A/D converter, set the VCUT bit to “0” (Vref unconnected), so that no current will flow
from the V
The result of A/D conversion is stored in the AD register.
Table 14.1 shows the performance of the A/D converter. Figure 14.1 shows a block diagram of the A/D
converter, and Figures 14.2 and 14.3 show the A/D converter-related registers.
When AVcc is less than 4.2V,
Without sample and hold function, the
With the sample and hold function, the
Jan 27, 2006
Item
REF
pin into the resistor ladder, helping to reduce the power consumption of the chip.
AD (2)
(1)
page 124 of 205
AD
must be 10 MHz or less.
0V to Vref
AV
AV
8-bit or 10-bit (selectable)
AVcc = Vref = 5V
• 8-bit resolution ±2 LSB
• 10-bit resolution ±3 LSB
AVcc = Vref = 3.3 V
• 8-bit resolution ±2 LSB
• 10-bit resolution ±5 LSB
One-shot mode and repeat mode
12 pins (AN
• With sample and hold function
8-bit resolution: 49
8-bit resolution: 28
CC
CC
= 5V f
= 3V divide-by-2 of f
AD
must be f
0
AD
to AN
AD
, divide-by-2 of f
AD
frequency should be 250 kHz or more.
11
frequency should be 1 MHz or more.
AD
)
AD
AD
/2 or less by dividing f
cycles, 10-bit resolution: 59
cycles, 10-bit resolution: 33
AD
, divide-by-4 of f
Performance
AD
(3)
, divide-by-4 of f
0
to P0
7
AD
and P1
AD
.
AD
0
to P1
AD
AD
cycles
cycles
3
. Therefore, when
14. A/D Converter

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