R5F21134DFP#U0 Renesas Electronics America, R5F21134DFP#U0 Datasheet - Page 127

• Manufacturer Part Number: R5F21134DFP#U0
• Description: IC R8C MCU FLASH 32LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/13r

Specifications of R5F21134DFP#U0

• Core Size: 16-Bit
• Program Memory Size: 16KB (16K x 8)
• Oscillator Type: Internal
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• No. Of I/o's: 22
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1024Byte
• Cpu Speed: 20MHz
• No. Of Timers: 16
• Digital Ic Case: RoHS Compliant
• Controller Family/series: R8C/13
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

R8C/13 Group
Rev.1.20
REJ09B0111-0120
Figure 13.6 Transmit and Receive Operation
• Example of transmit timing (when internal clock is selected)
• Example of receive timing (when external clock is selected)
The above timing diagram applies to the case where the register bits are set as follows:
Make sure the following conditions are met when input to the CLK0 pin before receiving data is high:
f
The above timing diagram applies to the case where the register bits are set as follows:
Transfer clock
U0C1 register
TE bit
U0C1 register
TI bit
CLK
TxD
U0C0 register
TXEPT bit
S0TIC register
IR bit
U0C1 register
RE bit
U0C1 register
TE bit
CLK
RxD
S0RIC register
IR bit
EXT
U0C1 register
TI bit
U0C1 register
RI bit
• U0MR register CKDIR bit = 0 (internal clock)
• U0C0 register CKPOL bit = 0 (transmit data output at the falling edge and receive data taken in at the rising edge of the transfer clock)
• U0IRS bit = 0 (an interrupt request occurs when the transmit buffer becomes empty):
• U0C1 register TE bit = 1 (transmit enabled)
• U0C1 register RE bit = 1 (receive enabled)
• Write dummy data to the U0TB register
• U0MR register CKDIR bit = 1 (external clock)
• U0C0 register CKPOL bit = 0 (transmit data output at the falling edge and receive
0
: frequency of external clock
Jan 27, 2006
0
0
0
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
Transferred from UART0 receive register
page 116 of 205
Write data to U0TB register
D
0
data taken in at the rising edge of the transfer clock)
Write dummy data to U0TB register
D
D
1
0
Transferred from U0TB register to UART0 transmit register
T
D
D
CLK
2
1
D
D
3
2
to U0RB register
D
D
4
Tc
3
D
D
5
4
1 / f
D
Receive data is taken in
D
6
5
EXT
Set to “0” when interrupt request is accepted, or set by a program
Transferred from U0TB register to UART0 transmit register
D
Set to “0” when interrupt request is accepted, or set by a program
D
7
6
D
D
0
7
D
1
Tc = T
Read out from U0RB register
D
D
2
0
fi: frequency of U0BRG count source (f
n: value set to U0BRG register
D
CLK
D
3
1
D
D
4
= 2(n + 1) / fi
2
D
D
5
3
D
D
6
4
D
13.1 Clock Synchronous Serial I/O Mode
7
D
5
Stopped pulsing because the TE bit = 0
D
0
D
1
D
2
1SIO
D
3
, f
D
8SIO
4
D
, f
5
32SIO
D
6
D
)
7