R5F21134DFP#U0 Renesas Electronics America, R5F21134DFP#U0 Datasheet - Page 154

• Manufacturer Part Number: R5F21134DFP#U0
• Description: IC R8C MCU FLASH 32LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/13r

Specifications of R5F21134DFP#U0

• Core Size: 16-Bit
• Program Memory Size: 16KB (16K x 8)
• Oscillator Type: Internal
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• No. Of I/o's: 22
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1024Byte
• Cpu Speed: 20MHz
• No. Of Timers: 16
• Digital Ic Case: RoHS Compliant
• Controller Family/series: R8C/13
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

R8C/13 Group
Rev.1.20
REJ09B0111-0120
Figure 15.7 PD0 Register, PD1 Register, PD3 Register, and PD4 Register
Figure 15.8 P0 Register to P4 Register
P o r t P i r e g i s t e r ( i = 0 , 1 , 3 , 4 )
P o r t P i d i r e c t i o n r e g i s t e r ( i = 0 , 1 , 3 , 4 )
b 7
b 7
N O T E S :
Jan 27, 2006
NOTES:
1 . B i t s P 3 _ 4 t o P 3 _ 6 i n t h e P 3 r e g i s t e r a r e u n a v a i l a b l e o n t h i s M C U . I f i t i s n e c e s s a r y t o s e t b i t s P 3 _ 4 t o
2 . B i t s P 4 _ 0 t o P 4 _ 4 i n t h e P 4 r e g i s t e r a r e u n a v a i l a b l e o n t h i s M C U . I f i t i s n e c e s s a r y t o s e t b i t s P 4 _ 0 t o
1. The PD0 register must be written to by the next instruction after setting the PRC2 bit in the PRCR
2. Bits PD3_4 to PD3_6 in the PD3 register are unavailable on this MCU. If it is necessary to set bits
3. Bits PD4_0 to PD4_4, PD4_6 and PD4_7 in the PD4 register are unavailable on this MCU. If it is
b 6
b 6
P 3 _ 6 , s e t t o “ 0 ” ( “ L ” l e v e l ) . W h e n r e a d , t h e c o n t e n t i s i n d e t e r m i n a t e .
P 4 _ 4 , s e t t o “ 0 ” ( “ L ” l e v e l ) . W h e n r e a d , t h e c o n t e n t i s i n d e t e r m i n a t e .
register to “1” (write enabled).
PD3_4 to PD3_6, set to “0” (input mode). When read, the content is indeterminate.
necessary to set bits PD4_0 to PD4_4, PD4_6 and PD4_7, set to “0” (input mode). When read,
the content is indeterminate.
b 5
b 5
b4
b 4
b3
b 3
b 2
b 2
page 143 of 205
b 1
b 1
b 0
b 0
Pi_0
P i _ 1
P i _ 2
P i _ 3
P i _ 4
P i _ 5
P i _ 6
P i _ 7
Bit symbol
P D i _ 0
P D i _ 1
P D i _ 2
P D i _ 3
P D i _ 4
P D i _ 5
P D i _ 6
P D i _ 7
B i t s y m b o l
S y m b o l
S y m b o l
P 0
P 1
P 3
P 4
( 1 , 2 )
P D 0
P D 1
P D 3
P D 4
Port Pi
P o r t P i
P o r t P i
P o r t P i
P o r t P i
P o r t P i
P o r t P i
P o r t P i
P o r t P i
P o r t P i
P o r t P i
P o r t P i
P o r t P i
P o r t P i
P o r t P i
P o r t P i
(1, 2, 3)
0
1
2
3
4
5
6
7
B i t n a m e
bit
b i t
b i t
b i t
b i t
b i t
b i t
b i t
0
1
2
3
4
5
6
7
B i t n a m e
d i r e c t i o n b i t
d i r e c t i o n b i t
d i r e c t i o n b i t
d i r e c t i o n b i t
d i r e c t i o n b i t
d i r e c t i o n b i t
d i r e c t i o n b i t
d i r e c t i o n b i t
A d d r e s s
0 0 E 0
0 0 E 1
0 0 E 5
0 0 E 8
1 6
1 6
1 6
1 6
A d d r e s s
0 0 E 3
0 0 E A
0 0 E 2
0 0 E 7
1 6
1 6
1 6
1 6
T h e p i n l e v e l o n a n y I / O p o r t w h i c h i s
s e t f o r i n p u t m o d e c a n b e r e a d b y
r e a d i n g t h e c o r r e s p o n d i n g b i t i n t h i s
r e g i s t e r .
T h e p i n l e v e l o n a n y I / O p o r t w h i c h i s
s e t f o r o u t p u t m o d e c a n b e c o n t r o l l e d
b y w r i t i n g t o t h e c o r r e s p o n d i n g b i t i n
t h i s r e g i s t e r
0 : “ L ” l e v e l
1 : “ H ” l e v e l
0 : Input mode
1 : Output mode
(Functions as an input port)
(Functions as an output port)
Function
F u n c t i o n
I n d e t e r m i n a t e
I n d e t e r m i n a t e
I n d e t e r m i n a t e
I n d e t e r m i n a t e
15. Programmable I/O Ports
( i = 0 , 1 , 3 , 4 )
A f t e r r e s e t
A f t e r r e s e t
0 0
0 0
0 0
0 0
1 6
1 6
1 6
1 6
R W
R W
R W
R W
R W
R W
R W
R W
R W
R W
R W
R W
R W
R W
R W
R W
R W
RW