R5F21134DFP#U0 Renesas Electronics America, R5F21134DFP#U0 Datasheet - Page 143

IC R8C MCU FLASH 32LQFP

R5F21134DFP#U0

Manufacturer Part Number
R5F21134DFP#U0
Description
IC R8C MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/13r
Datasheets

Specifications of R5F21134DFP#U0

Core Size
16-Bit
Program Memory Size
16KB (16K x 8)
Oscillator Type
Internal
Core Processor
R8C
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
22
Eeprom Memory Size
4KB
Ram Memory Size
1024Byte
Cpu Speed
20MHz
No. Of Timers
16
Digital Ic Case
RoHS Compliant
Controller Family/series
R8C/13
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21134DFP#U0R5F21134DFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21134DFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/13 Group
Rev.1.20
REJ09B0111-0120
Figure 14.7 A/D Conversion Cycles
Figure 14.6 A/D Conversion Timing Diagram
14.4 A/D conversion cycles
14.3 Sample and Hold
Sample & Hold
Figure 14.7 shows the A/D conversion cycles.
If the SMP bit in the ADCON2 register is set to “1” (with sample-and-hold), the conversion speed per
pin is increased to 28
and-hold is effective in all operation modes. Select whether or not to use the sample-and-hold function
before starting A/D conversion.
When performing the A/D conversion, charge the comparator capacitor inside the microcomputer.
Figure 14.6 shows the A/D conversion timing diagram.
Sample & Hold
Jan 27, 2006
Without sample & hold
Without sample & hold
With sample & hold
With sample & hold
disabled
A/D conversion mode
enabled
page 132 of 205
Sampling time
Sampling time
Conversion time at the 1st bit
Conversion time at the 1st bit
4 AD cycle
4 AD cycle
10 bits
10 bits
8 bits
8 bits
ØAD
cycles for 8-bit resolution or 33
Conversion
49 AD
59 AD
28 AD
33 AD
time
Comparison
Comparison
time
time
Sampling
4 AD
4 AD
4 AD
4 AD
time
Conversion time
14.3 Sample and Hold mode/14.4 A/D conversion cycles
at the 1st bit
at the 2nd bit
Comparison
Sampling time
2.5 AD cycle
time
Comparison
at the 2nd bit
2.0 AD
2.0 AD
2.5 AD
2.5 AD
time
Comparison
ØAD
Comparison
* Repeat until conversion ends
time
time
Sampling
cycles for 10-bit resolution. Sample-
2.5 AD
2.5 AD
0.0 AD
0.0 AD
Conversion time at the
2nd bit and the follows
time
* Repeat until conversion ends
* Repeat until conversion ends
2.5 AD cycle
Sampling time
Comparison
2.5 AD
2.5 AD
2.5 AD
2.5 AD
time
Comparison
End process
End process
time
8.0 AD
8.0 AD
4.0 AD
4.0 AD

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