R5F21134DFP#U0 Renesas Electronics America, R5F21134DFP#U0 Datasheet - Page 11

• Manufacturer Part Number: R5F21134DFP#U0
• Description: IC R8C MCU FLASH 32LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/13r

Specifications of R5F21134DFP#U0

• Core Size: 16-Bit
• Program Memory Size: 16KB (16K x 8)
• Oscillator Type: Internal
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• No. Of I/o's: 22
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1024Byte
• Cpu Speed: 20MHz
• No. Of Timers: 16
• Digital Ic Case: RoHS Compliant
• Controller Family/series: R8C/13
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SFR Page Reference
Blank columns are all reserved space. No use is allowed.
A d d r e s s
0 0 8 0
0 0 8 1
0 0 8 2
0 0 8 3
0 0 8 4
0 0 8 5
0 0 8 6
0 0 8 7
0 0 8 8
0 0 8 9
0 0 8 A
0 0 8 B
0 0 8 C
0 0 8 D
0 0 8 E
0 0 8 F
0 0 9 0
0 0 9 1
0 0 9 2
0 0 9 3
0 0 9 4
0 0 9 5
0 0 9 6
0 0 9 7
0 0 9 8
0 0 9 9
0 0 9 A
0 0 9 B
0 0 9 C
0 0 9 D
0 0 9 E
0 0 9 F
0 0 A 0
0 0 A 1
0 0 A 2
0 0 A 3
0 0 A 4
0 0 A 5
0 0 A 6
0 0 A 7
0 0 A 8
0 0 A 9
0 0 A A
0 0 A B
0 0 A C
0 0 A D
0 0 A E
0 0 A F
0 0 B 0
0 0 B 1
0 0 B 2
0 0 B 3
0 0 B 4
0 0 B 5
0 0 B 6
0 0 B 7
0 0 B 8
0 0 B 9
0 0 B A
0 0 B B
0 0 B C
0 0 B D
0 0 B E
0 0 B F
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
T i m e r Y s e c o n d a r y r e g i s t e r
U A R T 0 t r a n s m i t b u f f e r r e g i s t e r
U A R T 0 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 0
T i m e r Y , Z m o d e r e g i s t e r
P r e s c a l e r Y r e g i s t e r
T i m e r Y p r i m a r y r e g i s t e r
T i m e r Y , Z w a v e f o r m o u t p u t c o n t r o l r e g i s t e r
P r e s c a l e r Z r e g i s t e r
T i m e r Z s e c o n d a r y r e g i s t e r
T i m e r Z p r i m a r y r e g i s t e r
T i m e r Y , Z o u t p u t c o n t r o l r e g i s t e r
T i m e r X m o d e r e g i s t e r
P r e s c a l e r X r e g i s t e r
T i m e r X r e g i s t e r
T i m e r co u n t s o u r c e s e t t i n g r e g i s t e r
T i m e r C r e g i s t e r
E x t e r n a l i n p u t e n a b l e r e g i s t e r
K e y i n p u t e n a b l e r e g i s t e r
T i m e r C c o n t r o l r e g i s t e r 0
T i m e r C c o n t r o l r e g i s t e r 1
C a p t u r e a n d c o m p a r e 0 r e g i s t e r
C o m p a r e 1 r e g i s t e r
U A R T 0 t r a n s m i t / r e c e i v e m o d e r e g i s t e r
U A R T 0 b i t r a t e r e g i s t e r
U A R T 0 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 1
U A R T 0 r e c e i v e b u f f e r r e g i s t e r
U A R T 1 t r a n s m i t / r e c e i v e m o d e r e g i s t e r
U A R T 1 b i t r a t e r e g i s t e r
U A R T 1 t r a n s m i t b u f f e r r e g i s t e r
U A R T 1 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 0
U A R T 1 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 1
U A R T 1 r e c e i v e b u f f e r r e g i s t e r
U A R T
t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 2
R e g i s t e r
S y m b o l P a g e
T Y Z M R 8 0 / 8 8
T Y Z O C 8 1 / 8 9
U 0 B R G
U 1 B R G
T Y S C
T C C 0
T Y P R
T C S S
U 0 T B
T Z S C
I N T E N
T C C 1
U 1 M R
U 1 T B
U 1 R B
P R E Y
P R E Z
T Z P R
T X M R
P R E X
U 1 C 0
U C O N
K I E N
U 0 M R
U 0 C 1
U 0 R B
U 1 C 1
T M 1
U 0 C 0
P U M
T M 0
T C
T X
7 2 / 8 2 / 9 0
8 2 / 9 0
7 2
1 0 3
1 0 4
1 0 3
7 1
7 2
1 1 1
1 1 1
1 1 1
8 9
8 9
8 9
1 0 3
1 1 1
1 1 3
1 1 2
1 1 1
1 1 1
1 1 2
1 1 3
8 1
6 5
8 1
1 0 3
6 0
1 1 2
1 1 2
8 1
1 1 3
B-2
0 F F F F
A d d r e s s
0 0 C 0
0 0 C 1
0 0 C 2
0 0 C 3
0 0 C 4
0 0 C 5
0 0 C 6
0 0 C 7
0 0 C 8
0 0 C 9
0 0 C A
0 0 C B
0 0 C C
0 0 C D
0 0 C E
0 0 C F
0 0 D 0
0 0 D 1
0 0 D 2
0 0 D 3
0 0 D 4
0 0 D 5
0 0 D 6
0 0 D 7
0 0 D 8
0 0 D 9
0 0 D A
0 0 D B
0 0 D C
0 0 D D
0 0 D E
0 0 D F
0 0 E 0
0 0 E 1
0 0 E 2
0 0 E 3
0 0 E 4
0 0 E 5
0 0 E 6
0 0 E 7
0 0 E 8
0 0 E 9
0 0 E A
0 0 E B
0 0 E C
0 0 E D
0 0 E E
0 0 E F
0 0 F 0
0 0 F 1
0 0 F 2
0 0 F 3
0 0 F 4
0 0 F 5
0 0 F 6
0 0 F 7
0 0 F 8
0 0 F 9
0 3 F A
0 0 F B
0 0 F C
0 0 F D
0 0 F E
0 0 F F
0 1 B 3
0 1 B 4
0 1 B 5
0 1 B 6
0 1 B 7
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
T i m e r C o u t p u t c o n t r o l r e g i s t e r
A D r e g i s t e r
A D c o n t r o l r e g i s t e r 2
A D c o n t r o l r e g i s t e r 0
AD control register 1
Port P0 register
P o r t P 1 r e g i s t e r
P o r t P 0 d i r e c t i o n r e g i s t e r
Port P1 direction register
Port P3 register
Port P3 direction register
Port P4 register
Port P4 direction register
P o r t P 1 d r i v e c a p a c i t y c o n t r o l r e g i s t e r
F l a s h m e m o r y c o n t r o l r e g i s t e r 4
F l a s h m e m o r y c o n t r o l r e g i s t e r 1
Flash memory control register 0
O p t i o n f u n c t i o n s e l e c t r e g i s t e r
P u l l - u p c o n t r o l r e g i s t e r 0
P u l l - u p c o n t r o l r e g i s t e r 1
R e g i s t e r
A D C O N 2 1 2 7
A D C O N 0 1 2 6
ADCON1 126
T C O U T
S y m b o l Page
P U R 0
F M R 4
F M R 1
P U R 1
FMR0
D R R
O F S
P D 0
A D
PD1
PD3
P4
PD4
P 1
P0
P3
1 2 7
143
1 4 4
1 4 3
143
143
1 4 4
143
1 4 3
143
143
1 4 4
1 0 4
1 7 2
1 7 2
171
6 9