R5F21134DFP#U0 Renesas Electronics America, R5F21134DFP#U0 Datasheet - Page 90

• Manufacturer Part Number: R5F21134DFP#U0
• Description: IC R8C MCU FLASH 32LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/13r

Specifications of R5F21134DFP#U0

• Core Size: 16-Bit
• Program Memory Size: 16KB (16K x 8)
• Oscillator Type: Internal
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• No. Of I/o's: 22
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1024Byte
• Cpu Speed: 20MHz
• No. Of Timers: 16
• Digital Ic Case: RoHS Compliant
• Controller Family/series: R8C/13
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

R8C/13 Group
Rev.1.20
REJ09B0111-0120
Figure 12.10 Operation Example in Pulse Period Measurement Mode
U n d e r f l o w s i g n a l
o f p r e s c a l e r X
T X S b i t i n
T X M R r e g i s t e r
C N T R 0 p i n
i n p u t
T i m e r X
r e a d - o u t b u f f e r
T X E D G b i t i n
T X M R r e g i s t e r
TXUND bit in
TXMR register
IR bit in TXIC
register
I R b i t i n I N T 1 I C
r e g i s t e r
c o n t e n t s
C o n t e n t s o f
C o n d i t i o n s : A p e r i o d f r o m o n e r i s i n g e d g e t o t h e n e x t r i s i n g e d g e o f m e a s u r e m e n t p u l s e i s m e a s u r e d ( R 0 E D G = 0 )
NOTES:
1. The contents of the read-out buffer can be read when the TX register is read in pulse period measurement mode.
2. After an active edge of measurement pulse is input, the TXEDG bit in the TXMR register is set to "1" (active edge found)
3. The TX register should be read before the next active edge is input after the TXEDG bit is set to "1" (active edge found).
4. When set to "0" by program, use a MOV instruction to write "0" to the TXEDG in the TXMR register. At the same time,
5. When set to "0" by program, use a MOV instruction to write "0" to the TXUND in the TXMR register. At the same time,
6. The TXUND and TXEDG bits are both set to "1" if the timer underflows and reloads on an active edge simultaneously. In
7. If the CNTR
Jan 27, 2006
when the prescaler X underflows for the second time.
The contents in the read-out buffer is retained until the TX register is read. If the TX register is not read before the next
active edge is input, the measured result of the previous period is retained.
write "1" to the TXUND bit.
write "1" to the TXEDG bit.
this case, the validity of the TXUND bit should be determined by the contents of the read-out buffer.
read buffer. If "L" level, the following count value is the one of the read buffer.
w i t h T X r e g i s t e r i n i t i a l v a l u e = 0 F
1
0
active edge is input, when the prescaler X underflow signal is "H" level, its count value is the one of the
“ 1 ”
“ 0 ”
“1”
“ 0 ”
“1”
“0”
“1”
“0”
“ 1 ”
“ 0 ”
“ 1 ”
“ 0 ”
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S t a r t s c o u n t i n g
0 F
S e t t o " 1 " b y p r o g r a m
0 F
1 6
1 6
0 E
( 7 )
1 6
0F
R e t a i n e d
16
Cleared to “0” when interrupt request is accepted, or cleared by program
T i m e r X
r e l o a d s
(2)
0E
1 6
16
0 E
.
0D
1 6
Cleared to “0” when interrupt request is accepted, or cleared by program
16
0 C
1 6
Cleared to "0" by program
0 B
1 6
0 A
0 A
1 6
T i m e r X r e a d
1 6
0 9
09
1 6
16
(3)
0 8
Retained
1 6
(2)
0F
08
(4)
16
Timer X
reloads
16
(7)
0E
16
0D
0 D
Timer X read
16
1 6
C l e a r e d t o " 0 " b y p r o g r a m
(3)
01
0 1
12.1 Timer (Timer X)
16
1 6
0 0
0 0
1 6
1 6
(6)
0 F
0 F
1 6
T i m e r X
r e l o a d s
1 6
(5)
0 E
0 E
1 6
1 6