PIC16F785-I/SO Microchip Technology, PIC16F785-I/SO Datasheet - Page 104

• Manufacturer Part Number: PIC16F785-I/SO
• Description: IC PIC MCU FLASH 2KX14 20SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F785-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 20-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICXLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC162060 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOIC
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F785
14.6
Data memory can be code-protected by programming
the CPD bit in the Configuration Word (Register 15-1)
to ‘0’.
When the data memory is code-protected, the CPU is
able to read and write data to the data EEPROM. It is
recommended to code-protect the program memory
when code-protecting data memory. This prevents
anyone from programming zeroes over the existing
code (which will execute as NOPs) to reach an added
routine, programmed in unused program memory,
which
Programming unused locations in program memory to
‘0’ will also help prevent data memory code protection
from becoming breached.
TABLE 14-1:
0Bh, 8Bh
0Ch
8Ch
9Ah
9Bh
9Ch
9Dh
Legend: x = unknown, u = unchanged, — = unimplemented read as ‘0’, q = value depends upon condition.
DS41249A-page 102
Address
outputs
DATA EEPROM OPERATION
DURING CODE-PROTECT
Shaded cells are not used by data EEPROM module.
INTCON
PIR1
PIE1
EEDAT
EEADR
EECON1
EECON2
Name
the
REGISTERS/BITS ASSOCIATED WITH DATA EEPROM
EEDAT7 EEDAT6 EEDAT5 EEDAT4 EEDAT3 EEDAT2 EEDAT1 EEDAT0 0000 0000 0000 0000
EEADR7 EEADR6 EEADR5 EEADR4 EEADR3 EEADR2 EEADR1 EEADR0 0000 0000 0000 0000
EEPROM Control register 2 (not a physical register)
contents
EEIF
EEIE
Bit 7
GIE
—
ADIE
Bit 6
PEIE
ADIF
—
of
data
CCP1IE
CCP1IF
Bit 5
T0IE
—
memory.
Preliminary
INTE
C2IE
Bit 4
C2IF
—
WRERR
RAIE
Bit 3
C1IF
C1IE
OSFIF
OSFIE
WREN
Bit 2
T0IF
TMR2IE TMR1IE 0000 0000 0000 0000
TMR2IF TMR1IF 0000 0000 0000 0000
Bit 1
INTF
WR
RAIF
 2004 Microchip Technology Inc.
Bit 0
RD
0000 0000 0000 0000
---- x000 ---- q000
---- ---- ---- ----
POR, BOR
Value on:
Value on all
Resets
other