PIC16F785-I/SO Microchip Technology, PIC16F785-I/SO Datasheet - Page 108

• Manufacturer Part Number: PIC16F785-I/SO
• Description: IC PIC MCU FLASH 2KX14 20SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F785-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 20-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICXLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC162060 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOIC
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F785
15.3.1
The on-chip POR circuit holds the chip in Reset until
V
operation. To take advantage of the POR, simply con-
nect the MCLR pin through a resistor to V
eliminate external RC components usually needed to
create Power-on Reset. A minimum rise time for V
required. See Section 18.0 “Electrical Specifica-
tions” for details. If the BOR is enabled, the minimum
rise time specification does not apply. The BOR
circuitry will keep the device in Reset until V
V
(BOR)”)
The POR circuit on this device has a POR re-arm
circuit. This circuit is designed to ensure a re-arm of
the POR circuit if V
voltage (V
Once V
minimum required time, the POR reset will reactivate
and remain in reset until V
than V
initiated to allow V
safely above V
When the device starts normal operation (exits the
Reset condition), device operating parameters
(i.e., voltage, frequency, temperature, etc.) must be
met to ensure operation. If these conditions are not
met, the device must be held in Reset until the operat-
ing conditions are met.
For additional information, refer to the “Power-up
Trouble Shooting” Application Note (DS00607).
15.3.2
PIC16F785 has a noise filter in the MCLR Reset path.
The filter will detect and ignore small pulses.
It should be noted that a WDT Reset does not drive
MCLR pin low.
The behavior of the ESD protection on the MCLR pin
has been altered from early devices of this family.
Voltages applied to the pin that exceed its specification
can result in both MCLR Resets and excessive current
beyond the device specification during the ESD event.
For this reason, Microchip recommends that the MCLR
pin no longer be tied directly to V
network, as shown in Figure 15-2, is suggested.
An internal MCLR option is enabled by clearing the
MCLRE bit in the Configuration Word. When cleared,
MCLR is internally tied to V
Pull-up is enabled for the MCLR pin. In-Circuit Serial
Programming is not affected by selecting the internal
MCLR option.
DS41249A-page 106
DD
BOR
has reached a high enough level for proper
POR.
DD
(see
PARM
has been below the re-arming point for the
POWER-ON RESET
MASTER CLEAR (MCLR)
At this point, a 1 s (typical) delay will be
) for at least the minimum required time.
POR.
Section 15.3.4
DD
DD
to continue to ramp to a voltage
drops below a preset re-arming
DD
DD
returns to a value greater
and an internal Weak
“Brown-Out
DD
. The use of an RC
DD
DD
. This will
reaches
Reset
DD
Preliminary
is
FIGURE 15-2:
15.3.3
The Power-up Timer provides a fixed 64 ms (nominal)
time out on power-up only, from POR or Brown-out
Reset. The Power-up Timer operates from the 31 kHz
LFINTOSC oscillator. For more information, see
Section 3.4 “Internal Clock Modes”. The chip is kept
in Reset as long as PWRT is active. The PWRT delay
allows the V
uration bit, PWRTE can disable (if ‘1’) or enable (if ‘0’)
the Power-up Timer. The Power-up Timer should be
enabled when Brown-out Reset is enabled, although it
is not required.
The Power-up Time delay will vary from chip-to-chip
and vary due to:
• V
• Temperature variation
• Process variation
See
“Electrical Specifications”).
DD
DC
variation
V
DD
R1
1 k
POWER-UP TIMER (PWRT)
C1
0.1 µF
(optional, not critical)
DD
parameters
to rise to an acceptable level. A config-
or greater)
RECOMMENDED
CIRCUIT
 2004 Microchip Technology Inc.
for
details
MCLR
PIC16F785
(Section 18.0
MCLR