PIC16F785-I/SO Microchip Technology, PIC16F785-I/SO Datasheet - Page 129

• Manufacturer Part Number: PIC16F785-I/SO
• Description: IC PIC MCU FLASH 2KX14 20SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F785-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 20-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICXLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC162060 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOIC
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

GOTO
Syntax:
Operands:
Operation:
Status Affected:
Description:
INCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
INCFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
 2004 Microchip Technology Inc.
Increment f, Skip if 0
[ label ]
0
d
(f) + 1
None
The contents of register ‘f’ are
incremented. If ‘d’ is 0, the result
is placed in the W register. If ‘d’ is
1, the result is placed back in
register ‘f’.
If the result is 1, the next instruc-
tion is executed. If the result is 0,
a NOP is executed instead, making
it a 2-cycle instruction.
Unconditional Branch
[ label ]
0
k
PCLATH<4:3>
None
GOTO is an unconditional branch.
The eleven-bit immediate value is
loaded into PC bits <10:0>. The
upper bits of PC are loaded from
PCLATH<4:3>. GOTO is a two-
cycle instruction.
Increment f
[ label ]
0
d
(f) + 1
Z
The contents of register ‘f’ are
incremented. If ‘d’ is 0, the result
is placed in the W register. If ‘d’ is
1, the result is placed back in
register ‘f’.
skip if result = 0
f
k
f
[0,1]
[0,1]
PC<10:0>
127
127
2047
(destination),
GOTO k
(destination)
INCFSZ f,d
INCF f,d
PC<12:11>
Preliminary
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Inclusive OR W with f
[ label ]
0
d
(W) .OR. (f)
Z
Inclusive OR the W register with
register ‘f’. If ‘d’ is 0, the result is
placed in the W register. If ‘d’ is 1,
the result is placed back in
register ‘f’.
Inclusive OR Literal with W
[ label ]
0
(W) .OR. k
Z
The contents of the W register are
OR’ed with the eight-bit literal ‘k’.
The result is placed in the W
register.
Move f
[ label ]
0
d
(f)
Z
The contents of register ‘f’ is
moved to a destination dependent
upon the status of d. If ‘d’ = 0,
destination is W register. If ‘d’ = 1,
the destination is file register ‘f’
itself. ‘d’ = 1 is useful to test a file
register since status flag Z is
affected.
1
1
After Instruction
00
MOVF
f
[0,1]
k
f
[0,1]
(dest)
127
127
PIC16F785
255
W
register
Z
IORWF
IORLW k
MOVF f,d
1000
FSR,
=
=
(W)
(destination)
DS41249A-page 127
0
1
value in FSR
dfff
f,d
ffff