PIC16F785-I/SO Microchip Technology, PIC16F785-I/SO Datasheet - Page 88

• Manufacturer Part Number: PIC16F785-I/SO
• Description: IC PIC MCU FLASH 2KX14 20SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F785-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 20-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICXLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC162060 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOIC
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F785
12.4
A device Reset forces all registers to their Reset state.
Thus, the A/D module is turned off and any pending
conversion is aborted. The ADRESH:ADRESL regis-
ters are unchanged.
12.5
An A/D conversion can be started by the “special event
trigger” of the CCP module. This requires that the
CCP1M3:CCP1M0 bits (CCP1CON<3:0>) be pro-
grammed as ‘1011’ and that the A/D module is enabled
(ADON bit is set). When the trigger occurs, the
GO/DONE bit will be set, starting the A/D conversion
TABLE 12-3:
DS41249A-page 86
05h,
105h
06h,
106h
07h,
107h
0Bh,
8Bh
0Ch
1Eh
1Fh
85h,
185h
86h,
186h
87h,
187h
8Ch
91h
93h
9Eh
9Fh
Legend:
Addr
PORTA
PORTB
PORTC
INTCON
PIR1
ADRESH
ADCON0
TRISA
TRISB
TRISC
PIE1
ANSEL0
ANSEL1
ADRESL
ADCON1
Name
Effects of Reset
Use of the CCP Trigger
x = unknown, u = unchanged, — = unimplemented read as '0'. Shaded cells are not used for A/D module.
Most Significant 8 bits of the left justified A/D result or 2 bits of the right justified result
Least Significant 2 bits of the left justified A/D result or 8 bits of the right justified result
SUMMARY OF A/D REGISTERS
TRISB7
TRISC7
ADFM
ANS7
Bit 7
EEIF
EEIE
RB7
RC7
GIE
—
—
—
—
TRISB6
TRISC6
ADCS2
VCFG
ANS6
Bit 6
PEIE
ADIF
ADIE
RB6
RC6
—
—
—
CCP1IF
TRISA5
TRISB5
TRISC5
CCP1IE
ADCS1
CHS3
Bit 5
ANS5
RC5
T0IE
RA5
RB5
—
TRISA4
TRISB4
TRISC4
ADCS0
CHS2
ANS4
Bit 4
INTE
C2IE
C2IF
RA4
RB4
RC4
—
Preliminary
TRISC3
TRISA3
ANS11
CHS1
ANS3
Bit 3
RAIE
C1IF
C1IE
RC3
RA3
—
—
—
and the Timer1 counter will be reset to zero. Timer1 is
reset to automatically repeat the A/D acquisition period
with
ADRESH:ADRESL to the desired location).
The appropriate analog input channel must be selected
and the minimum acquisition done before the “special
event trigger” sets the GO/DONE bit (starts a
conversion).
If the A/D module is not enabled (ADON is cleared),
then the “special event trigger” will be ignored by the
A/D module, but will still reset the Timer1 counter. See
Section 8.0 “Capture/Compare/PWM (CCP) Mod-
ule” for more information.
TRISA2
TRISC2
ANS10
OSFIF
OSFIE
CHS0
ANS2
Bit 2
RA2
RC2
T0IF
—
—
—
minimal
GO/DONE
TMR2IF
TMR2IE
TRISA1
TRISC1
ANS1
ANS9
Bit 1
INTF
RA1
RC1
—
—
—
software
TMR1IE
TMR1IF
TRISA0
TRISC0
ADON
ANS0
ANS8
Bit 0
RAIF
RA0
RC0
 2004 Microchip Technology Inc.
—
—
—
overhead
POR, BOR
--xx xxxx
xxxx ----
xxxx xxxx
0000 0000
0000 0000
xxxx xxxx
0000 0000
--11 1111
1111 ----
1111 1111
0000 0000
1111 1111
---- 1111
xxxx xxxx
-000 ----
Value on:
(moving
--uu uuuu
uuuu ----
uuuu uuuu
0000 0000
0000 0000
uuuu uuuu
0000 0000
--11 1111
1111 ----
1111 1111
0000 0000
1111 1111
---- 1111
uuuu uuuu
-000 ----
Value on
all other
Resets
the