PIC16F785-I/SO Microchip Technology, PIC16F785-I/SO Datasheet - Page 39

• Manufacturer Part Number: PIC16F785-I/SO
• Description: IC PIC MCU FLASH 2KX14 20SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F785-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 20-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICXLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC162060 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOIC
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.2.3.3
Figure 4-3 shows the diagram for this pin. The RA2 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the A/D
• the clock input for TMR0
• an external edge triggered interrupt
• a digital output from comparator 1
FIGURE 4-3:
 2004 Microchip Technology Inc.
INTERRUPT-ON-
DATA BUS
PORTA
PORTA
WPUA
WPUA
TRISA
TRISA
C1OE
C1OUT
IOCA
IOCA
WR
WR
WR
WR
RD
RD
RD
RD
CHANGE
D
D
D
D
TO TMR0
TO INT
TO A/D CONVERTER
CK
CK
CK
CK
RA2/AN2/T0CKI/INT/C1OUT
Q
Q
Q
Q
Q
Q
Q
Q
BLOCK DIAGRAM OF RA2
RD PORTA
Q
Q
Q
RAPU
ANS2
ANS2
1
0
EN
EN
EN
D
D
D
Q1
V
DD
WEAK
V
V
DD
SS
Q3
I/O PIN
Preliminary
4.2.3.4
Figure 4-4 shows the diagram for this pin. The RA3 pin
is configurable to function as one of the following:
• a general purpose input
• as Master Clear Reset w/weak pull-up
FIGURE 4-4:
DATA BUS
INTERRUPT-ON-
WPUA
WPUA
PORTA
IOCA
IOCA
TRISA
WR
RD
RD
RD
WR
RD
CHANGE
D
D
CK
CK
RA3/MCLR/V
Q
Q
Q
Q
RESET
BLOCK DIAGRAM OF RA3
V
SS
RAPU
MCLRE
PIC16F785
PP
RD PORTA
MCLRE
Q
Q
Q
MCLRE
DS41249A-page 37
EN
EN
EN
D
D
D
V
DD
Q1
WEAK
V
SS
Q3
INPUT
PIN