DF2214BQ16V Renesas Electronics America, DF2214BQ16V Datasheet - Page 13

• Manufacturer Part Number: DF2214BQ16V
• Description: IC H8S/2214 MCU FLASH 112-TFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2214BQ16V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-TFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Item
7.5.9 DMAC Bus
Cycles (Dual
Address Mode)
(2) Full Address
Mode (Cycle Steal
Mode)
8.2.5 DTC Transfer
Count Register A
(CRA)
8.3.1 Overview
Figure 8.2
Flowchart of DTC
Operation
8.3.2 Activation
Sources
Page
234
258
262
264
Revisions (See Manual for Details)
Description amended
Either a one-byte or a one-word transfer is performed for each
transfer request, and after the transfer the bus is released.
Description amended
In repeat mode or block transfer mode, CRA is divided into two
parts: the upper 8 bits (CRAH) and the lower 8 bits (CRAL). In
repeat mode, CRAH holds the transfer count and CRAL functions
as an 8-bit transfer counter (1 to 256). In block transfer mode,
CRAH holds the block size and functions as an 8-bit block size
counter (1 to 256). CRAL is decremented by 1 every time data is
transferred and when the counter value becomes H'00 the
contents of CRAH are transferred. This operation is repeated.
Note added
Description added
... The activation source flag, in the case of RXI0, for example, is
the RDRF flag of SCI0.
Since there are multiple factors that can initiate DTC operation,
the flag that initiated the transfer is not cleared after the last byte
(or word) is transferred. The corresponding interrupt handler must
perform the required processing.
Note: * See the section on the corresponding peripheral module for details
Clear an activation flag
Transfer Counter = 0
on the content of the processing required for interrupt handling.
or DISEL = 1
No
End
Yes
Rev.4.00 Sep. 18, 2008 Page xi of lx
Interrupt exception
Clear DTCER
handling
REJ09B0189-0400
*