DF2214BQ16V Renesas Electronics America, DF2214BQ16V Datasheet - Page 144

• Manufacturer Part Number: DF2214BQ16V
• Description: IC H8S/2214 MCU FLASH 112-TFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2214BQ16V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-TFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 4 Exception Handling
4.2
4.2.1
A reset has the highest exception priority.
When the RES or MRES pin goes low, all processing halts and the H8S/2214 enters the reset state.
A reset initializes the internal state of the CPU and the registers of on-chip supporting modules.
Immediately after a reset, interrupt control mode 0 is set.
Reset exception handling begins when the RES or MRES pin changes from low to high.
The levels of the RES and MRES pins at reset determine whether a power-on reset or a manual
reset is effected.
The H8S/2214 can also be reset by overflow of the watchdog timer. For details see section 11,
Watchdog Timer (WDT).
4.2.2
A reset can be of either of two types: a power-on reset or a manual reset. Reset types are shown in
table 4.3. A power-on reset should be used when powering on.
The internal state of the CPU is initialized by either type of reset. A power-on reset also initializes
all the registers in the on-chip supporting modules, while a manual reset initializes all the registers
in the on-chip supporting modules except for the bus controller and I/O ports, which retain their
previous states.
With a manual reset, since the on-chip supporting modules are initialized, ports used as on-chip
supporting module I/O pins are switched to I/O ports controlled by DDR and DR.
Table 4.3
Type
Power-on reset
Manual reset
Rev.4.00 Sep. 18, 2008 Page 82 of 872
REJ09B0189-0400
Reset
Overview
Reset Types
Reset Types
MRES
*
Low
Reset Transition
Conditions
RES
Low
High
CPU
Initialized
Initialized
On-Chip Supporting Modules
Initialized
Initialized, except for bus controller
and I/O ports
Internal State
*: Don’t care