DF2214BQ16V Renesas Electronics America, DF2214BQ16V Datasheet - Page 313
DF2214BQ16V
Manufacturer Part Number
DF2214BQ16V
Description
IC H8S/2214 MCU FLASH 112-TFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets
1.HS2214ECB62H.pdf
(938 pages)
2.HEWH8E10A.pdf
(19 pages)
3.D12312SVTE25V.pdf
(341 pages)
Specifications of DF2214BQ16V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-TFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2214BQ16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 313 of 938
- Download datasheet (6Mb)
8.1
The H8S/2214 Group includes a data transfer controller (DTC). The DTC can be activated by an
interrupt or software, to transfer data.
8.1.1
The features of the DTC are:
• Transfer possible over any number of channels
• Wide range of transfer modes
• Direct specification of 16-Mbyte address space possible
• Transfer can be set in byte or word units
• A CPU interrupt can be requested for the interrupt that activated the DTC
• Activation by software is possible
• Module stop mode can be set
⎯ Transfer information is stored in memory
⎯ One activation source can trigger a number of data transfers (chain transfer)
⎯ Normal, repeat, and block transfer modes available
⎯ Incrementing, decrementing, and fixing of source and destination addresses can be selected
⎯ 24-bit transfer source and destination addresses can be specified
⎯ An interrupt request can be issued to the CPU after one data transfer ends
⎯ An interrupt request can be issued to the CPU after the specified data transfers have
⎯ The initial setting enables DTC registers to be accessed. DTC operation is halted by setting
completely ended
module stop mode.
Overview
Features
Section 8 Data Transfer Controller (DTC)
Section 8 Data Transfer Controller (DTC)
Rev.4.00 Sep. 18, 2008 Page 251 of 872
REJ09B0189-0400
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