DF2214BQ16V Renesas Electronics America, DF2214BQ16V Datasheet - Page 84
DF2214BQ16V
Manufacturer Part Number
DF2214BQ16V
Description
IC H8S/2214 MCU FLASH 112-TFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets
1.HS2214ECB62H.pdf
(938 pages)
2.HEWH8E10A.pdf
(19 pages)
3.D12312SVTE25V.pdf
(341 pages)
Specifications of DF2214BQ16V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-TFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2214BQ16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 2 CPU
(e) Stack Structure
When the program counter (PC) is pushed onto the stack in a subroutine call, and the PC,
condition-code register (CCR), and extended control register (EXR) are pushed onto the stack in
exception handling, they are stored as shown in figure 2.3. When EXR is invalid, it is not pushed
onto the stack. For details, see section 4, Exception Handling.
(2) Advanced Mode
(a) Address Space
Linear access is provided to a 16-Mbyte maximum address space (architecturally a maximum 16-
Mbyte program area and a maximum 4-Gbyte data area, with a maximum of 4 Gbytes for program
and data areas combined).
(b) Extended Registers (En)
The extended registers (E0 to E7) can be used as 16-bit registers, or as the upper 16-bit segments
of 32-bit registers or address registers.
(c) Instruction Set
All instructions and addressing modes can be used.
Rev.4.00 Sep. 18, 2008 Page 22 of 872
REJ09B0189-0400
SP
Notes: 1.
(a) Subroutine Branch
2.
3.
When EXR is not used it is not stored on the stack.
SP when EXR is not used.
Ignored when returning.
(16 bits)
Figure 2.3 Stack Structure in Normal Mode
PC
(SP
SP
*
2
)
(b) Exception Handling
Reserved *
(16 bits)
CCR *
EXR *
CCR
PC
1
3
1
*
3
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