D6417709SF167BV Renesas Electronics America, D6417709SF167BV Datasheet - Page 171
D6417709SF167BV
Manufacturer Part Number
D6417709SF167BV
Description
IC SUPER H MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of D6417709SF167BV
Core Processor
SH-3
Core Size
32-Bit
Speed
167MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
D6417709SF167BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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6.2.6
Interrupt Exception Handling and Priority
Tables 6.4 and 6.5 list the codes for the interrupt event registers (INTEVT and INTEVT2), and the
order of interrupt priority. Each interrupt source is assigned a unique code. The start address of the
interrupt service routine is common to each interrupt source. This is why, for instance, the value of
INTEVT or INTEVT2 is used as offset at the start of the interrupt service routine and branched to
in order to identify the interrupt source.
The priority of the on-chip peripheral module, IRQ, and PINT interrupts is set within priority
levels 0–15 as required by using interrupt priority registers A–E (IPRA–IPRE). The priority of the
on-chip peripheral module, IRQ, and PINT interrupts is set to 0 by a reset.
When the priorities of multiple interrupt sources are set to the same level and such interrupts are
generated simultaneously, they are handled according to the default order shown in tables 6.4 and
6.5.
Rev. 5.00, 09/03, page 125 of 760
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