D6417709SF167BV Renesas Electronics America, D6417709SF167BV Datasheet - Page 648

• Manufacturer Part Number: D6417709SF167BV
• Description: IC SUPER H MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417709SF167BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 167MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

19.9.2
Note: * Undefined
The port H data register (PHDR) is a 1-bit readable/writable and 7-bit read-only register that stores
data for pins PTH7 to PTH0. Bits PH7DT to PH0DT correspond to pins PTH7 to PTH0. When the
pin function is general output port, if the port is read, the value of the corresponding PHDR bit is
returned directly. When the function is general input port, if the port is read, the corresponding pin
level is read. Table 19.16 shows the function of PHDR.
PHDR is initialized to B'0******* by a power-on reset, after which the general input port function
(pull-up MOS on) is set as the initial pin function, and the corresponding pin levels are read. It
retains its previous value in standby mode and sleep mode, and in a manual reset.
Note that the low level is read if bits 6 to 0 are read except in general-purpose input.
Table 19.16 Port H Data Register (PHDR) Read/Write Operations
PHnMD1
0
1
PHnMD1
0
1
Rev. 5.00, 09/03, page 602 of 760
Initial value:
Port H Data Register (PHDR)
PHnMD0
0
1
0
1
PHnMD0
0
1
0
1
R/W:
Bit:
PH7DT
R/W
7
0
Pin State
Other function
(see table 18.1)
Output
Input (Pull-up
MOS on)
Input (Pull-up
MOS off)
Pin State
Other function
(see table 18.1)
Reserved
Input (Pull-up
MOS on)
Input (Pull-up
MOS off)
PH6DT
R
6
*
PH5DT
Read
PHDR value
PHDR value
Pin state
Pin state
Read
Low level
Low level
Pin state
Pin state
R
5
*
PH4DT
R
4
*
Write
Value is written to PHDR, but does not
affect pin state
Write value is output from pin
Value is written to PHDR, but does not
affect pin state
Value is written to PHDR, but does not
affect pin state
Write
Ignored (no effect on pin state)
Ignored (no effect on pin state)
Ignored (no effect on pin state)
Ignored (no effect on pin state)
PH3DT
R
3
*
PH2DT
R
2
*
PH1DT
R
1
*
(n = 0 to 6)
PH0DT
(n = 7)
R
0
*