D6417709SF167BV Renesas Electronics America, D6417709SF167BV Datasheet - Page 683
![IC SUPER H MPU ROMLESS 208LQFP](/photos/12/31/123112/d6417709sf167bv_sml.jpg)
D6417709SF167BV
Manufacturer Part Number
D6417709SF167BV
Description
IC SUPER H MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of D6417709SF167BV
Core Processor
SH-3
Core Size
32-Bit
Speed
167MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417709SF167BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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21.2
21.2.1
The D/A data registers (DADR0 and DADR1) are 8-bit readable/writable registers that store the
data to be converted. When analog output is enabled, the D/A data register values are constantly
converted and output at the analog output pins.
The D/A data registers are initialized to H'00 by a reset.
21.2.2
DACR is an 8-bit readable/writable register that controls the operation of the D/A converter.
DACR is initialized to H'1F by a reset.
Bit 7—D/A Output Enable 1 (DAOE1): Controls D/A conversion and analog output.
Bit 7: DAOE1
0
1
Bit 6—D/A Output Enable 0 (DAOE0): Controls D/A conversion and analog output.
Bit 6: DAOE0
0
1
Initial value:
Initial value:
Register Descriptions
D/A Data Registers 0 and 1 (DADR0/1)
D/A Control Register (DACR)
R/W:
R/W:
Bit:
Bit:
Description
DA1 analog output is disabled
Channel-1 D/A conversion and DA1 analog output are enabled
Description
DA0 analog output is disabled
Channel-0 D/A conversion and DA0 analog output are enabled
DAOE1 DAOE0
R/W
R/W
7
0
7
0
R/W
R/W
6
0
6
0
DAE
R/W
R/W
5
0
5
0
R/W
—
R
4
0
4
1
R/W
—
R
3
0
3
1
Rev. 5.00, 09/03, page 637 of 760
R/W
—
R
2
0
2
1
R/W
—
R
1
0
1
1
(Initial value)
(Initial value)
R/W
—
R
0
0
0
1
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