D6417709SF167BV Renesas Electronics America, D6417709SF167BV Datasheet - Page 590
![IC SUPER H MPU ROMLESS 208LQFP](/photos/12/31/123112/d6417709sf167bv_sml.jpg)
D6417709SF167BV
Manufacturer Part Number
D6417709SF167BV
Description
IC SUPER H MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of D6417709SF167BV
Core Processor
SH-3
Core Size
32-Bit
Speed
167MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417709SF167BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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4. When modem control is enabled, transmission can be stopped and restarted in accordance with
Rev. 5.00, 09/03, page 544 of 760
TXI interrupt
request
TEND
Figure 16.7 shows an example of the operation for transmission.
TDFE
the CTS input value. When CTS is set to 1, if transmission is in progress, the line goes to the
mark state after transmission of one frame. When CTS is set to 0, the next transmit data is
output starting from the start bit.
Figure 16.8 shows an example of the operation when modem control is used.
Serial
Serial
data
TXD
CTS
data
1
Figure 16.8 Example of Operation Using Modem Control (C C C C T T T T S S S S )
Start
bit
Start
0
bit
Data written to
SCFTDR and TDFE
flag read as 1 then
cleared to 0 by TXI
interrupt handler
0
D
D
0
Figure 16.7 Example of Transmit Operation
0
D
One frame
D
1
1
Data
(8-Bit Data, Parity, One Stop Bit)
Rise at this point
before stop bit
D
D
7
Parity
7
Parity
bit
0/1
bit
TXI interrupt
request
0/1
Stop
bit
Stop
1
bit
Start
bit
0
D
0
D
1
Start
Data
bit
0
D
D
7
0
Parity
bit
0/1
D
1
Stop
bit
1
D
Idle (mark)
state
7
1
0/1
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