ATMEGA32HVB-8X3 Atmel, ATMEGA32HVB-8X3 Datasheet - Page 137

• Manufacturer Part Number: ATMEGA32HVB-8X3
• Description: MCU AVR 32KB FLASH 8MHZ 44TSSOP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32HVB-8X3

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI
• Peripherals: POR, WDT
• Number Of I /o: 17
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 25 V
• Data Converters: A/D 7x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TSSOP
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, TWI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRSB200
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 7 Channel
• Package: 44TSSOP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5|9|12|15|18|24 V
• For Use With: ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.3.5
24.4
8042B–AVR–06/10
External Protection Input
Charge High-current Protection
When the Discharge High-current Protection is activated, the external D-FET and C-FET are dis-
abled and a Current Protection Timer is started. This timer ensures that the FETs are disabled
for at least one second. The application software must then set the DFE and CFE bits in the FET
Control and Status Register to re-enable normal operation. If the D-FET is re-enabled while the
loading of the battery still is too large, the Discharge High-current Protection will be activated
again.
If the voltage at the PPI/NNI pins is above the Charge High-current Detection level for a time lon-
ger than High-current Protection Reaction Time, the chip activates Charge High-current
Protection.
When the Charge High-current Protection is activated, the external D-FET and C-FET are dis-
abled and a Current Protection Timer is started. This timer ensures that the FETs are disabled
for at least one second. The application software must then set the DFE and CFE bits in the FET
Control and Status Register to re-enable normal operation. If the C-FET is re-enabled and the
charger continues to supply too high currents, the Charge High-current Protection will be acti-
vated again.
The Short-circuit, Over-current and High-current Protection parameters are programmable to
adapt to different types of batteries. The parameters are set by writing to I/O Registers. The
Parameter Registers can be locked after the initial configuration, prohibiting any further updates
until the next Hardware Reset.
Refer to ”Register Description for Battery Protection” on page 125 for register descriptions.
The External Protection Input uses the alternate port function of the General Purpose High Vot-
lage I/O to automatically disabling the external Charge and Discharge-FET. For details, see
”High Voltage I/O Ports” on page
Using this together with the External Interrupt (see
235) features a highly flexible solution for the customer and it allows the user to customize an
external protection scheme suitable for battery applications.
The External Protection Input disables both the C-FET and D-FET immediately when the voltage
on EXTPROT pin is pulled high (logic ‘1’). It is also used to disable DUVR mode if DUVR mode
is enabled. Note that, unlike a Battery Protection event, the External Protection input does not
affect the status of the FCSR (CFE, DFE, DUVRD, and CPS) bits. When the ‘high’ condition dis-
appears, the FET disabling is released immediately. DUVR mode is automatically re-entered if
previously enabled.
The feature is automatically enabled when the chip starts up, and can be disabled before locking
the BPCR register. When locking the BPCR register, the External Protection feature is also
locked.
When External Protection Input is enabled, an override enable signal is set to EXTPROT pin
configuring the pin as digital input. The port may be set up to give an interrupt when the pin
value changes, and the protection status can be read from the port register.
Note that the External Protection Input is default enabled. This means that after reset (and dur-
ing reset) the port is default overridden to digital input, independent of the port register setting.
62.
”External Interrupt Characteristics” on page
ATmega16HVB/32HVB
137