ATMEGA32HVB-8X3 Atmel, ATMEGA32HVB-8X3 Datasheet - Page 152

• Manufacturer Part Number: ATMEGA32HVB-8X3
• Description: MCU AVR 32KB FLASH 8MHZ 44TSSOP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32HVB-8X3

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI
• Peripherals: POR, WDT
• Number Of I /o: 17
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 25 V
• Data Converters: A/D 7x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TSSOP
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, TWI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRSB200
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 7 Channel
• Package: 44TSSOP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5|9|12|15|18|24 V
• For Use With: ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

25.3.3
25.3.4
8042B–AVR–06/10
Deep Under Voltage operation with Pre-charge FET
Operation in Reset and Power off
6. The total cell voltage has reached 5V. DUVR mode is disabled and the C-FET can be
7. Battery voltage reached charger voltage.
If a charger without pre-charge functionality is used, the Pre-charge FET will provide the current
path and the pre-charge resistor will limit the charge current during charging of deeply over-dis-
charged cells. After reaching sufficient battery voltage it is safe to turn on the Charge FET to
increase the charge current. Deep Under Voltage Operation with Pre-charge FET is supported
through PC5, which is a high voltage open drain pin. For configuration and usage of this pin, see
”High Voltage I/O Ports” on page
In reset and power-off the C-FET and D-FET will be automatically turned off. Safety is remained
by active pulling OC/OD hard to ground.
fully enabled. DUVR mode should be disabled before the C-CFET is enabled. VFET and
Pack+ will therefore rise to the charger voltage for a short period before the C-FET is
enabled.
62.
ATmega16HVB/32HVB
152