ATMEGA32HVB-8X3 Atmel, ATMEGA32HVB-8X3 Datasheet - Page 61
![MCU AVR 32KB FLASH 8MHZ 44TSSOP](/photos/12/32/123222/44x1-tssop_sml.jpg)
ATMEGA32HVB-8X3
Manufacturer Part Number
ATMEGA32HVB-8X3
Description
MCU AVR 32KB FLASH 8MHZ 44TSSOP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32HVB-8X3
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI
Peripherals
POR, WDT
Number Of I /o
17
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 25 V
Data Converters
A/D 7x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TSSOP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, TWI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
17
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRSB200
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 7 Channel
Package
44TSSOP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
5|9|12|15|18|24 V
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32HVB-8X3
Manufacturer:
Atmel
Quantity:
408
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- Download datasheet (7Mb)
13.2.7
8042B–AVR–06/10
PCMSK0 – Pin Change Mask Register 0
• Bit 7:0 – PCINT[11:4]: Pin Change Enable Mask 15:8
These bits select whether pin change interrupt is enabled on the corresponding I/O pin. If
PCINT[11:4] is set and the PCIE1 bit in EIMSK is set, pin change interrupt is enabled on the cor-
responding I/O pin. If PCINT[11:4] is cleared, pin change interrupt on the corresponding I/O pin
is disabled.
• Bits 7:4 – Reserved
These bits are reserved in the ATmega16HVB/32HVB, and will always read as zero.
• Bit 3:0 – PCINT[3:0]: Pin Change Enable Mask 3:0
Each PCINT[3:0] bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT[3:0] is set and the PCIE0 bit in PCICR is set, pin change interrupt is enabled on the
corresponding I/O pin. If PCINT[3:0] is cleared, pin change interrupt on the corresponding I/O
pin is disabled.
Bit
(0x6B)
Read/Write
Initial Value
R
7
–
0
R
6
–
0
R
5
–
0
R
4
–
0
PCINT3
R/W
ATmega16HVB/32HVB
3
0
PCINT2
R/W
2
0
PCINT1
R/W
1
0
PCINT0
R/W
0
0
PCMSK0
61
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