ATMEGA32HVB-8X3 Atmel, ATMEGA32HVB-8X3 Datasheet - Page 20

• Manufacturer Part Number: ATMEGA32HVB-8X3
• Description: MCU AVR 32KB FLASH 8MHZ 44TSSOP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32HVB-8X3

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI
• Peripherals: POR, WDT
• Number Of I /o: 17
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 25 V
• Data Converters: A/D 7x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TSSOP
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, TWI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRSB200
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 7 Channel
• Package: 44TSSOP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5|9|12|15|18|24 V
• For Use With: ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.5.1
8.6
8.6.1
8.6.2
8042B–AVR–06/10
Register Description
General Purpose I/O Registers
EEARH and EEARL– The EEPROM Address Register High and Low
EEDR – The EEPROM Data Register
the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space
u s i n g L D a n d S T i n s t r u c t i o n s , 0 x 2 0 m u s t b e a d d e d t o t h e s e a d d r e s s e s . T h e
ATmega16HVB/32HVB is a complex microcontroller with more peripheral units than can be sup-
ported within the 64 location reserved in Opcode for the IN and OUT instructions. For the
Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instruc-
tions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI
instructions will only operate on the specified bit, and can therefore be used on registers contain-
ing such status flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only.
The I/O and peripherals control registers are explained in later sections.
The ATmega16HVB/32HVB contains three General Purpose I/O Registers. These registers can
be used for storing any information, and they are particularly useful for storing global variables
and Status Flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are
directly bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
• Bits 15:10 – Reserved
These bits are reserved bits in the ATmega16HVB/32HVB and will always read as zero.
• Bits 9:0 – EEAR9:0: EEPROM Address
The EEPROM Address Registers – EEAR specify the EEPROM address in the 512/1K bytes
EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 511/1023.
The initial value of EEAR is undefined. A proper value must be written before the EEPROM may
be accessed.
Bit
0x22 (0x42)
0x21 (0x41)
Bit
Read/Write
Initial Value
Bit
0x20 (0x40)
Read/Write
Initial Value
EEAR7
MSB
R/W
R/W
15
R
7
0
X
7
0
EEAR6
R/W
R/W
14
R
6
0
X
6
0
EEAR5
R/W
R/W
13
R
5
0
X
5
0
EEAR4
R/W
R/W
12
R
X
4
0
4
0
EEAR3
R/W
ATmega16HVB/32HVB
R/W
11
R
3
0
X
3
0
EEAR2
R/W
R/W
10
R
X
2
0
2
0
EEAR9
EEAR1
R/W
R/W
R/W
X
X
9
1
1
0
EEAR8
EEAR0
R/W
R/W
LSB
R/W
X
X
8
0
0
0
EEARH
EEARL
EEDR
20