ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 117

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ST10F280

Manufacturer Part Number
ST10F280
Description
MCU 16BIT 512K FLASH MAC 208-PBG
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F280

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, SSC
Peripherals
POR, PWM, WDT
Number Of I /o
143
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
18K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 32x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
208-PBGA
Processor Series
ST10F28x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Baud Rate Generation
The Baud rate generator is clocked by f
timer is counting downwards and can be started
or stopped through the global enable Bit SSCEN
in register SSCCON. Register SSCBR is the
dual-function
register. Reading SSCBR, while the SSC is
enabled, returns the content of the timer. Reading
SSCBR, while the SSC is disabled, returns the
programmed reload value. In this mode the
desired reload value can be written to SSCBR.
Note
The formulas below calculate the resulting Baud
rate for a given reload value and the required
reload value for a given Baud rate:
Baud rate
SSCBR = (
Never write to SSCBR, while the SSC is
enabled.
SSC
Baud
=
2 x Baud rate
2 x [(SSCBR) + 1]
Rate
f
CPU
f
CPU
Generator/Reload
SSC
) 1
CPU
/2. The
(SSCBR) represents the content of the reload
register, taken as unsigned 16 Bit integer.
Table 26 lists some possible Baud rates against
the required reload values and the resulting bit
times for a 40MHz CPU clock.
Table 26 : Synchronous Baud Rate and Reload
Values
Reserved use a
reload value > 0.
10M Baud
5M Baud
2.5M Baud
1M Baud
100K Baud
10K Baud
1K Baud
306 Baud
Baud Rate
Bit Time
3.26ms
100ns
200ns
400ns
100 s
10 s
1ms
1 s
---
Reload Value
ST10F280
07CFh
FF4Eh
00C7h
4E1Fh
0001h
0003h
0007h
0013h
---
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