ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 67

• Manufacturer Part Number: ST10F280
• Description: MCU 16BIT 512K FLASH MAC 208-PBG
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F280

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, SSC
• Peripherals: POR, PWM, WDT
• Number Of I /o: 143
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 18K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 32x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 208-PBGA
• Processor Series: ST10F28x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

XPWM Control Registers
Register XPWMCON0 controls the function of the timers of the four XPWM channels and the channel
specific interrupts. Having the control bits organized in functional groups allows e.g. to start or stop all 4
XPWM timers simultaneously with one bitfield instruction. Note: This register is not bit-addressable.
XPWMCON0 (EC00h)
Register XPWMCON1 controls the operating modes and the outputs of the four XPWM channels. The
basic operating mode for each channel (standard=edge aligned, or symmetrical=center aligned PWM
mode) is selected by the mode bits XPMx. Burst mode (channels 0 and 1) and single shot mode (channel
2 or 3) are selected by separate control bits. The output signal of each XPWM channel is individually
enabled by bit PENx. If the output is not enabled the respective pin can only be used to generate an inter-
rupt request. Note: This register is not bit-addressable.
XPWMCON1 (EC02h)
PTRx
PTIx
PIEx
PIRx
PENx
PMx
PB01
PSx
PIR3
RW
PS3
RW
15
15
Bit
Bit
PIR2
RW
PS2
RW
14
14
0
1
0
1
0
1
0
1
PIR1
0
1
0
1
0
1
0
1
RW
13
13
-
-
XPWM Timer x Run Control Bit
Timer XPTx is disconnected from its input clock
Timer XPTx is running
XPWM Timer x Input Clock Selection
Timer XPTx clocked with CLK
TimerX PTx clocked with CLK
XPWM Channel x Interrupt Enable Flag
Interrupt from channel x disabled
Interrupt from channel x enabled
XPWM Channel x Interrupt Request Flag
No interrupt request from channel x
Channel x interrupt pending (must be reset via software)
XPWM Channel x Output Enable Bit
Channel x output signal disabled, generate interrupt only
Channel x output signal enabled
XPWM Channel x Mode Control Bit
Channel x operates in mode 0, edge aligned PWM
Channel x operates in mode 1, center aligned PWM
XPWM Channel 0/1 Burst Mode Control Bit
Channels 0 and 1 work independently in respective standard mode
Outputs of channels 0 and 1 are ANDed to XPWM0 in burst mode
XPWM Channel x Single Shot Mode Control Bit
Channel x works in respective standard mode
Channel x operates in single shot mode
PIR0
PB01
RW
RW
12
12
PIE3
RW
11
11
-
-
PIE2
RW
10
10
-
-
PIE1
RW
9
9
-
-
CPU
CPU
PIE0
RW
/ 64
8
8
-
-
PTI3
PM3
RW
RW
Function
7
7
Function
PTI2
PM2
RW
RW
6
6
PTI1
PM1
RW
RW
5
5
PTI0 PTR3 PTR2 PTR1 PTR0
RW
PM0
RW
4
4
PEN3
RW
RW
3
3
Reset Value: 0000h
Reset Value: 0000h
PEN2
RW
RW
2
2
PEN1
ST10F280
RW
RW
1
1
67/186
PEN0
RW
RW
0
0