ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 55

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ST10F280

Manufacturer Part Number
ST10F280
Description
MCU 16BIT 512K FLASH MAC 208-PBG
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F280

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, SSC
Peripherals
POR, PWM, WDT
Number Of I /o
143
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
18K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 32x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
208-PBGA
Processor Series
ST10F28x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Figure 13 : Block Diagram of CAPCOM Timers T0 and T7
Figure 14 : Block Diagram of CAPCOM Timers T1 and T8
Note: When
When a capture/compare register has been
selected for capture mode, the current contents of
the allocated timer will be latched (captured) into
the capture/compare register in response to an
external event at the port pin which is associated
with this register. In addition, a specific interrupt
request for this capture/compare register is
generated.
Either a positive, a negative, or both a positive
and a negative external signal transition at the pin
can be selected as the triggering event. The
TxIN
CPU
Clock
Over / Underflow
GPT2 Timer T6
CPU
Clock
Over / Underflow
GPT2 Timer T6
Pin
connected to the input lines of both T0 and
T7, these timers count the input signal
synchronously. Thus the two timers can be
regarded as one timer whose contents can
be compared with 32 capture registers.
Edge Select
Txl
an
Txl
Txl
X
X
external
MUX
TxM
Txl TxM
Control
Input
MUX
input
TxR
signal
TxR
is
Reload Register TxREL
CAPCOM Timer Tx
contents of all registers which have been selected
for one
continuously compared with the contents of the
allocated timers.
When a match occurs between the timer value
and the value in a capture /compare register,
specific actions will be taken based on the
selected compare mode (see Table 9).
The input frequencies f
selector Tx, are determined as a function of the
CPU
resolution and periods which result from the
selected pre-scaler option in TxI when using a
40MHz CPU clock are listed in the Table 10.
The numbers for the timer periods are based on a
reload value of 0000h. Note that some numbers
may be rounded to 3 significant figures.
Reload Register TxREL
CAPCOM Timer Tx
clocks.
of the five compare
The
timer
Tx
, for the timer input
TxIR
TxIR
input
modes are
frequencies,
ST10F280
Interrupt
Request
x = 1, 8
x = 0, 7
Interrupt
Request
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