ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 54

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ST10F280

Manufacturer Part Number
ST10F280
Description
MCU 16BIT 512K FLASH MAC 208-PBG
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F280

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, SSC
Peripherals
POR, PWM, WDT
Number Of I /o
143
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
18K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 32x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
208-PBGA
Processor Series
ST10F28x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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ST10F280
9 - CAPTURE/COMPARE (CAPCOM) UNITS
The ST10F280 has two 16 channels CAPCOM
units as described in Figure 12. These support
generation and control of timing sequences on up
to 32 channels with a maximum resolution of
200ns at 40MHz CPU clock. The CAPCOM units
are typically used to handle high speed I/O tasks
such as pulse and waveform generation, pulse
width modulation (PMW), Digital to Analog (D/A)
conversion, software timing, or time recording
relative to external events.
Four 16-bit timers (T0/T1, T7/T8) with reload
registers provide two independent time bases for
the capture/compare register array (See Figure 13
and Figure 14).
The input clock for the timers is programmable to
several prescaled values of the internal system
clock, or may be derived from an overflow/
underflow of timer T6 in module GPT2. This
Figure 12 : CAPCOM Unit Block Diagram
Note
54/186
The CAPCOM2 unit provides 16 capture inputs, but only 12 compare outputs. CC24I to CC27I are inputs only.
CPU
Clock
CPU
Clock
TxIN
Over / Underflow
Compare outputs
GPT2 Timer T6
Over / Underflow
GPT2 Timer T6
Capture inputs
2
2
n
n
n = 3...10
n = 3...10
Pin
Pin
Pin
16
Compare)
(Capture
Control
Control
Control
Mode
Input
Input
Tx
Ty
or
provides a wide range of variation for the timer
period
adjustments to application specific requirements.
In addition, external count inputs for CAPCOM
timers T0 and T7 allow event scheduling for the
capture/compare registers relative to external
events.
Each of the two capture/compare register arrays
contain
registers, each of which may be individually
allocated to either CAPCOM timer T0 or T1 (T7 or
T8, respectively), and programmed for capture or
compare functions. Each of the 32 registers has
one associated port pin which serves as an input
pin for triggering the capture function, or as an
output pin to indicate the occurrence of a compare
event. Figure 12 shows the basic structure of the
two CAPCOM units.
Reload Register TxREL
Reload Register TyREL
CAPCOM Timer Tx
(Capture/Compare)
CAPCOM Timer Ty
Sixteen 16-bit
Registers
and
16
dual
resolution
purpose
Capture / Compare *
Interrupt Requests
Interrupt
Request
Interrupt
Request
and
16
capture/compare
allows
x = 0, 7
y = 1, 8
precise

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