ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 80

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ST10F280

Manufacturer Part Number
ST10F280
Description
MCU 16BIT 512K FLASH MAC 208-PBG
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F280

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, SSC
Peripherals
POR, PWM, WDT
Number Of I /o
143
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
18K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 32x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
208-PBGA
Processor Series
ST10F28x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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ST10F280
While an external bus mode is enabled, the user software should not write to the port output latch, other-
wise unpredictable results may occur. When the external bus modes are disabled, the contents of the
direction register last written by the user becomes active.
Figure 31 : PORT1 I/O and Alternate Functions
The figure below shows the structure of a PORT1 pin.
Figure 32 : Block Diagram of a PORT1 Pin
12.4 - Port 2
If this 16-bit port is used for general purpose I/O, the direction of each line can be configured via the cor-
responding direction register DP2. Each port line can be switched into push/pull or open drain mode via
the open drain control register ODP2.
80/186
PORT1
General Purpose Input/Output
Alternate Function
P1H
P1L
Write DP1H.y / DP1L.y
Read DP1H.y / DP1L.y
Write P1H.y / P1L.y
Read P1H.y / P1L.y
Port Output
P1H.7
P1H.6
P1H.5
P1H.4
P1H.3
P1H.2
P1H.1
P1H.0
P1L.7
P1L.6
P1L.5
P1L.4
P1L.3
P1L.2
P1L.1
P1L.0
Direction
Latch
Latch
MUX
Port Data
Output
1
0
Alternate
Function
Enable
Alternate
Data
Output
8/16-bit Demultiplexed Bus
“1”
1
0
1
0
MUX
MUX
a)
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CPU Clock
Latch
Input
CAPCOM2 Capture Inputs
Output
Buffer
b)
CC27I
CC26I
CC25I
CC24I
y = 7...0
P1H.y
P1L.y

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