R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 145
R5F21324ANSP#U1
Manufacturer Part Number
R5F21324ANSP#U1
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Ar
Datasheet
1.R5F21322ANSPU1.pdf
(629 pages)
Specifications of R5F21324ANSP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Under development
R8C/32A Group
REJ09B0458-0020 Rev.0.20
Page 115 of 583
9.8
Table 9.5
Oscillation stop detection clock and
frequency bandwidth
Enabled condition for oscillation stop
detection function
Operation at oscillation stop detection
The oscillation stop detection function detects the stop of the XIN clock oscillating circuit.
The oscillation stop detection function can be enabled and disabled by the OCD0 bit in the OCD register.
Table 9.5 lists the Specifications of Oscillation Stop Detection Function.
When the XIN clock is the CPU clock source and bits OCD1 to OCD0 are set to 11b, the MCU is placed in the
following state if the XIN clock stops.
•
•
•
•
OCD2 bit in OCD register = 1 (on-chip oscillator clock selected)
OCD3 bit in OCD register = 1 (XIN clock stops)
CM14 bit in CM1 register = 0 (low-speed on-chip oscillator oscillates)
Oscillation stop detection interrupt request is generated
Oscillation Stop Detection Function
Preliminary specification
Specifications in this manual are tentative and subject to change.
Specifications of Oscillation Stop Detection Function
Item
Nov 05, 2008
f(XIN) ≥ 2 MHz
Bits OCD1 to OCD0 set to 11b
Oscillation stop detection interrupt generated
Specification
9. Clock Generation Circuit
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