R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 404

• Manufacturer Part Number: R5F21324ANSP#U1
• Description: MCU 1KB FLASH 16K ROM 20-LSSOP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/32Ar

Specifications of R5F21324ANSP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-LSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Under development
R8C/32A Group
REJ09B0458-0020 Rev.0.20
Page 374 of 583
24.3.4
Table 24.4
Notes:
SSUMS and BIDE: Bits in SSMR2 register
MSS: Bit in SSCRH register
TE and RE: Bits in SSER register
Clock synchronous
communication mode
4-wire bus
communication mode
4-wire bus
(bidirectional)
communication mode
Communication Mode
1. This pin can be used as a programmable I/O port.
2. Do not set both bits TE and RE to 1 in 4-wire bus (bidirectional) communication mode.
Synchronous serial communication unit switches the functions of the I/O pins in each communication mode
according to the setting of the MSS bit in the SSCRH register and bits RE and TE in the SSER register.
Table 24.4 lists the Association between Communication Modes and I/O Pins.
Communication Modes and Pin Functions
Preliminary specification
Specifications in this manual are tentative and subject to change.
Association between Communication Modes and I/O Pins
(2)
0
1
1
SSUMS
Nov 05, 2008
Disabled 0
0
1
BIDE
Bit Setting
1
0
1
0
1
MSS
0
1
0
1
0
1
0
1
0
1
0
1
24. Synchronous Serial Communication Unit (SSU)
TE
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
0
RE
Input
−
Input
Input
−
Input
−
Output
Output
Input
−
Input
−
−
−
−
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
SSI
Pin State
Output
Output
Output
−
Output
−
Output
Input
−
Input
−
Output
Input
Output
Input
Output
SSO
(1)
(1)
(1)
(1)
Input
Input
Input
Output
Output
Output
Input
Input
Input
Output
Output
Output
Input
Input
Output
Output
SSCK