R5F21324ANSP#U1 Renesas Electronics America, R5F21324ANSP#U1 Datasheet - Page 226

MCU 1KB FLASH 16K ROM 20-LSSOP

R5F21324ANSP#U1

Manufacturer Part Number
R5F21324ANSP#U1
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Ar
Datasheet

Specifications of R5F21324ANSP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21324ANSP#U1
Manufacturer:
Renesas Electronics America
Quantity:
135
Under development
R8C/32A Group
REJ09B0458-0020 Rev.0.20
Page 196 of 583
17.5
Table 17.4
Note:
Count source
Count operations
Divide ratio
Count start condition
Count stop conditions • 0 (count stops) is written to the TSTART bit in the TRACR register.
Interrupt request
generation timing
TRAIO pin function
TRAO pin function
Read from timer
Write to timer
Selectable functions
1. The level of the output pulse becomes the level when the pulse output starts when the TRAMR
In event counter mode, external signal inputs to the TRAIO pin are counted (refer to Table 17.4 Event
Counter Mode Specifications).
register is written to.
Event Counter Mode
Item
Preliminary specification
Specifications in this manual are tentative and subject to change.
Event Counter Mode Specifications
External signal which is input to TRAIO pin (active edge selectable by a program)
• Decrement
• When the timer underflows, the contents of the reload register are reloaded and
1/(n+1)(m+1)
n: setting value of TRAPRE register, m: setting value of TRA register
1 (count starts) is written to the TSTART bit in the TRACR register.
• 1 (count forcibly stops) is written to the TSTOP bit in the TRACR register.
When timer RA underflows [timer RA interrupt].
Count source input
Programmable I/O port or pulse output
The count value can be read by reading registers TRA and TRAPRE.
• When registers TRAPRE and TRA are written while the count is stopped, values
• When registers TRAPRE and TRA are written during the count, values are
• INT1 input polarity switch function
• Count source input pin select function
• Pulse output function
• Digital filter function
• Event input control function
the count is continued.
are written to both the reload register and counter.
written to the reload register and counter (refer to 17.3.2 Timer Write Control
during Count Operation).
The active edge of the count source is selected by the TEDGSEL bit in the
TRAIOC register.
P1_5 or P1_7 is selected by bits TRAIOSEL0 to TRAIOSEL1 in the TRASR
register.
Pulses of inverted polarity can be output from the TRAO pin each time the timer
underflows (selectable by the TOENA bit in the TRAIOC register).
Whether enabling or disabling the digital filter and the sampling frequency is
selected by bits TIPF0 and TIPF1 in the TRAIOC register.
The enabled period for the event input to the TRAIO pin is selected by bits
TIOGT0 and TIOGT1 in the TRAIOC register.
Nov 05, 2008
Specification
(1)
(1)
17. Timer RA

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