R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 142

• Manufacturer Part Number: R5F2121AJFP#U0
• Description: MCU FLASH 96K 5K CMOS 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/21r

Specifications of R5F2121AJFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
Figure 14.5
14.1.1
Table 14.2
Timer RA I/O Control Register
Count Sources
Count Operations
Divide Ratio
Count Start Condition
Count Stop Conditions • Write 0 (count stops) to the TSTART bit in the TRACR register
Interrupt Request
Generation Timing
INT1/TRAIO Pin
Function
TRAO Pin Function
Read from Timer
Write to Timer
b7 b6 b5 b4
In this mode, the timer counts an internally generated count source (see Table 14.2 Timer Mode
Specifications).
Figure 14.5 shows the TRAIOC Register in Timer Mode.
0 0
Item
b3 b2
Timer Mode
0
b1 b0
0
Timer Mode Specifications
TRAIOC Register in Timer Mode
0
Bit Symbol
TEDGSEL
TRAIOC
TOENA
TIOSEL
(b7-b6)
Symbol
TOPCR
TIPF0
TIPF1
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f1, f2, f8, fOCO
• Decrement
• When the timer underflows, the contents in the reload register is reloaded and
n: setting value of TRAPRE register, m: setting value of TRA register
Write 1 (count starts) to the TSTART bit in the TRACR register
• Write 1 (count forcibly stops) to the TSTOP bit in the TRACR register
When Timer RA underflows [Timer RA interrupt]
Programmable I/O port or INT1 interrupt input
Programmable I/O port
• When registers TRAPRE and TRA are written during the count, values are
1/(n+1)(m+1)
The count value can be read by reading the TRA and TRAPRE registers
• When registers TRAPRE and TRA are written while the count is stopped,
the count is inherited
values are written to both the reload register and counter.
written to the reload register and counter (refer to 14.1.1.1 Timer Write
Control during Count Operation).
TRAIO polarity sw itch bit
TRAIO output control bit
TRAO output enable bit
_____
INT1/
TRAIO input filter select bits
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
TRAIO select bit
Address
Bit Name
0101h
Set to 0 in timer mode
0 : INT1
1 : INT1
Set to 0 in timer mode
_____
_____
Specification
/TRAIO pin (P1_7)
/TRAIO pin (P1_5)
After Reset
Function
00h
14. Timers
RW
RW
RW
RW
RW
RW
RW
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