R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 247

MCU FLASH 96K 5K CMOS 48-LQFP

R5F2121AJFP#U0

Manufacturer Part Number
R5F2121AJFP#U0
Description
MCU FLASH 96K 5K CMOS 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/21r
Datasheet

Specifications of R5F2121AJFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2121AJFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R5F2121AJFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
Figure 14.91
Timer RD Control Register i (i = 0 or 1)
b7 b6 b5 b4
NOTES:
0 0 0
1.
2.
3.
This bit is enabled w hen the STCLK bit in the TRDFCR register is set to 1 (external clock input enabled).
Set the TCK2 to TCK0 bits and CKEG1 to CKEG0 bits in the TRDCR0 and TRDCR1 registers to the same values.
This bit is enabled w hen the TCK2 to TCK0 bits are set to 101b (TRDCLK input) and the STCLK bit in the TRDFCR
register is set to 1 (external clock input enabled).
b3 b2
Registers TRDCR0 to TRDCR1 in Complementary PWM Mode
b1 b0
Bit Symbol
TRDCR0
TRDCR1
Symbol
CKEG0
CKEG1
CCLR0
CCLR1
CCLR2
TCK0
TCK1
TCK2
Page 229 of 458
Count source selection bit
External clock edge selection bit
TRDi counter clear selection bit
Address
Bit Name
0140h
0150h
(2)
(2,3)
b2 b1 b0
0 0 0 : f1
0 0 1 : f2
0 1 0 : f4
0 1 1 : f8
1 0 0 : f32
1 0 1 : TRDCLK input
1 1 0 : fOCO40M
1 1 1 : Do not set
b4 b3
0 0 : Count at the rising edge
0 1 : Count at the falling edge
1 0 : Count at both edges
1 1 : Do not set
Set to 000b (disable clear (free-running
operation)) in complementary PWM mode.
After Reset
Function
00h
00h
(1)
14. Timers
RW
RW
RW
RW
RW
RW
RW
RW
RW

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