R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 317

MCU FLASH 96K 5K CMOS 48-LQFP

R5F2121AJFP#U0

Manufacturer Part Number
R5F2121AJFP#U0
Description
MCU FLASH 96K 5K CMOS 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/21r
Datasheet

Specifications of R5F2121AJFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2121AJFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R5F2121AJFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
Figure 16.14
NOTE:
(1)
(2)
(3)
1. Write 0 after reading 1 to set the TEND bit to 0.
SSSR register
SSER register
Write transmit data to SSTDR register
Sample Flowchart of Data Transmission (Clock Synchronous Communication Mode)
Read TDRE bit in SSSR register
Read TEND bit in SSSR register
Page 299 of 458
Data transmit
Initialization
TDRE = 1 ?
TEND = 1 ?
continued?
Start
End
TEND bit ← 0
TE bit ← 0
Yes
No
Yes
No
(1)
Yes
No
(2) Determine whether data transmit is continued
(3) When the data transmit is completed, the TEND
(1) After reading the SSSR register and confirming
that the TDRE bit is set to 1, write the transmit
data to the SSTDR register. When write the
transmit data to the SSTDR register, the TDRE bit
is automatically set to 0.
bit is set to 1. Set the TEND bit to 0 and the TE bit
to 0 and complete transmit mode.
16. Clock Synchronous Serial Interface

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