R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 239

• Manufacturer Part Number: R5F2121AJFP#U0
• Description: MCU FLASH 96K 5K CMOS 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/21r

Specifications of R5F2121AJFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
Figure 14.84
Table 14.30
BFC0, BFD0, BFC1, BFD1: Bits in TRDMR Register
TRDGRA0
TRDGRB0
TRDGRC0
TRDGRD0
TRDGRA1
TRDGRB1
TRDGRC1
TRDGRD1
TRDGRC0
TRDGRD0
TRDGRC1
TRDGRD1
Timer RD General Register Ai, Bi, Ci and Di (i = 0 or 1)
(b15)
b7
NOTE:
Register
1.
The following registers are disabled in the reset synchronous PWM mode:
TRDPMR, TRDOCR, TRDDF0, TRDDF1, TRDIORA0, TRDIORC0, TRDPOCR0, TRDIORA1, TRDIORC1
and TRDPOCR1
Access the TRDGRAi to TRDGRDi registers in 16-bit units. Do not access them in 8-bit units.
Registers TRDGRAi, TRDGRBi, TRDGRCi and TRDGRDi in Reset Synchronous PWM
Mode
TRDGRji Register Functions in Reset Synchronous PWM Mode
(b8)
b0
BFC0 = 0
−
−
BFD0 = 0
−
−
BFC1 = 0
BFD1 = 0
BFC0 = 1
BFD0 = 1
BFC1 = 1
BFD1 = 1
b7
Setting
Refer to Table 14.30 TRDGRji Register Functions in Reset Synchronous PWM Mode
Page 221 of 458
General register. Set the PWM period.
General register. Set the changing point of
PWM1 output.
(These registers are not used in reset
synchronous PWM mode.)
General register. Set the changing point of
PWM2 output.
General register. Set the changing point of
PWM3 output.
(These points are not used in reset
synchronous PWM mode.)
Buffer register. Set the next PWM period.
(Refer to 14.3.2 Buffer Operation)
Buffer register. Set the changing point of the
next PWM1 output.
(Refer to 14.3.2 Buffer Operation)
Buffer register. Set the changing point of the
next PWM2 output.
(Refer to 14.3.2 Buffer Operation)
Buffer register. Set the changing point of the
next PWM3 output.
(Refer to 14.3.2 Buffer Operation)
b0
TRDGRA0
TRDGRA1
TRDGRB0
TRDGRC0
TRDGRD0
TRDGRB1
TRDGRC1
TRDGRD1
Symbol
Register Function
(1)
Function
014Bh-014Ah
015Bh-015Ah
014Dh-014Ch
015Dh-015Ch
0149h-0148h
014Fh-014Eh
0159h-0158h
015Fh-015Eh
Address
(Output inverted every
period of TRDIOC0 and
PWM pins)
TRDIOB0
TRDIOD0
−
TRDIOA1
TRDIOC1
TRDIOB1
TRDIOD1
−
(Output inverted every
period of TRDIOC0 and
PWM pins)
TRDIOB0
TRDIOD0
TRDIOA1
TRDIOC1
TRDIOB1
TRDIOD1
PWM Output Pin
After Reset
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
14. Timers
RW
RW