R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 146

MCU FLASH 96K 5K CMOS 48-LQFP

R5F2121AJFP#U0

Manufacturer Part Number
R5F2121AJFP#U0
Description
MCU FLASH 96K 5K CMOS 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/21r
Datasheet

Specifications of R5F2121AJFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2121AJFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R5F2121AJFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
14.1.3
Table 14.4
NOTE:
Count Source
Count Operations
Divide Ratio
Count Start Condition Write 1 (count starts) to the TSTART bit in the TRACR register
Count Stop
Conditions
Interrupt Request
Generation Timing
INT1/TRAIO Pin
Function
TRAO Pin Function
Read from Timer
Write to Timer
Select Functions
1. The level of output pulse turn into the level when the pulse output starts by writing the TRAMR
Event counter mode is mode to count an external signal which inputs from the INT1/TRAIO pin (see Table
14.4 Event Counter Mode Specifications).
Figure 14.8 shows the TRAIOC Register in Event Counter Mode.
register.
Item
Event Counter Mode
Event Counter Mode Specifications
Page 128 of 458
External signal which is input to TRAIO pin (active edge is selectable by a
program)
• Decrement
• When the timer underflows, the contents in the reload register is reloaded and
1/(n+1)(m+1)
n: setting value of TRAPRE register, m: setting value of TRA register
• Write 0 (count stops) to the TSTART bit in the TRACR register
• Write 1 (count forcibly stops) to the TSTOP bit in the TRACR register
When timer RA underflows [timer RA interrupt]
Count source input (INT1 interrupt input)
Programmable I/O port
The count value can be read by reading the TRA and TRAPRE registers
• When registers TRAPRE and TRA are written while the count is stopped, values
• When registers TRAPRE and TRA are written during the count, values are
• INT1 input polarity switch function
• Count source input pin select function
• Pulse output function
• Digital filter function
the count is inherited
are written to both the reload register and counter.
written to the reload register and counter (refer to 14.1.1.1 Timer Write Control
during Count Operation).
The TEDGSEL bit in the TRAIOC register can select the active edge of the
count source.
P1_7 or P1_5 is selected by the TIOSEL bit in the TRAIOC register.
The pulse which inverts the polarity can be output from the TRAO pin each time
the timer underflows. (selected by the TOENA bit in the TRAIOC register)
Bits TIPF0 and TIPF1 in the TRAIOC register enable or disable the digital filter
and select the sampling frequency.
(1)
Specification
14. Timers
(1)

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